esp32h2/pcr/
apb_freq_conf.rs

1#[doc = "Register `APB_FREQ_CONF` reader"]
2pub type R = crate::R<APB_FREQ_CONF_SPEC>;
3#[doc = "Register `APB_FREQ_CONF` writer"]
4pub type W = crate::W<APB_FREQ_CONF_SPEC>;
5#[doc = "Field `APB_DECREASE_DIV_NUM` reader - If this field's value is grater than PCR_APB_DIV_NUM, the clk_apb will be automatically down to clk_apb_decrease only when no access is on apb-bus, and will recover to the previous frequency when a new access appears on apb-bus. Set as one within (0,1,3) to set clk_apb_decrease as div1/div2/div4(default) of clk_ahb. Note that enable this function will reduce performance. Users can set this field as zero to disable the auto-decrease-apb-freq function. By default, this function is disable."]
6pub type APB_DECREASE_DIV_NUM_R = crate::FieldReader;
7#[doc = "Field `APB_DECREASE_DIV_NUM` writer - If this field's value is grater than PCR_APB_DIV_NUM, the clk_apb will be automatically down to clk_apb_decrease only when no access is on apb-bus, and will recover to the previous frequency when a new access appears on apb-bus. Set as one within (0,1,3) to set clk_apb_decrease as div1/div2/div4(default) of clk_ahb. Note that enable this function will reduce performance. Users can set this field as zero to disable the auto-decrease-apb-freq function. By default, this function is disable."]
8pub type APB_DECREASE_DIV_NUM_W<'a, REG> = crate::FieldWriter<'a, REG, 8>;
9#[doc = "Field `APB_DIV_NUM` reader - Set as one within (0,1,3) to generate clk_apb drived by clk_ahb. The clk_apb is div1(default)/div2/div4 of clk_ahb."]
10pub type APB_DIV_NUM_R = crate::FieldReader;
11#[doc = "Field `APB_DIV_NUM` writer - Set as one within (0,1,3) to generate clk_apb drived by clk_ahb. The clk_apb is div1(default)/div2/div4 of clk_ahb."]
12pub type APB_DIV_NUM_W<'a, REG> = crate::FieldWriter<'a, REG, 8>;
13impl R {
14    #[doc = "Bits 0:7 - If this field's value is grater than PCR_APB_DIV_NUM, the clk_apb will be automatically down to clk_apb_decrease only when no access is on apb-bus, and will recover to the previous frequency when a new access appears on apb-bus. Set as one within (0,1,3) to set clk_apb_decrease as div1/div2/div4(default) of clk_ahb. Note that enable this function will reduce performance. Users can set this field as zero to disable the auto-decrease-apb-freq function. By default, this function is disable."]
15    #[inline(always)]
16    pub fn apb_decrease_div_num(&self) -> APB_DECREASE_DIV_NUM_R {
17        APB_DECREASE_DIV_NUM_R::new((self.bits & 0xff) as u8)
18    }
19    #[doc = "Bits 8:15 - Set as one within (0,1,3) to generate clk_apb drived by clk_ahb. The clk_apb is div1(default)/div2/div4 of clk_ahb."]
20    #[inline(always)]
21    pub fn apb_div_num(&self) -> APB_DIV_NUM_R {
22        APB_DIV_NUM_R::new(((self.bits >> 8) & 0xff) as u8)
23    }
24}
25#[cfg(feature = "impl-register-debug")]
26impl core::fmt::Debug for R {
27    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
28        f.debug_struct("APB_FREQ_CONF")
29            .field("apb_decrease_div_num", &self.apb_decrease_div_num())
30            .field("apb_div_num", &self.apb_div_num())
31            .finish()
32    }
33}
34impl W {
35    #[doc = "Bits 0:7 - If this field's value is grater than PCR_APB_DIV_NUM, the clk_apb will be automatically down to clk_apb_decrease only when no access is on apb-bus, and will recover to the previous frequency when a new access appears on apb-bus. Set as one within (0,1,3) to set clk_apb_decrease as div1/div2/div4(default) of clk_ahb. Note that enable this function will reduce performance. Users can set this field as zero to disable the auto-decrease-apb-freq function. By default, this function is disable."]
36    #[inline(always)]
37    pub fn apb_decrease_div_num(&mut self) -> APB_DECREASE_DIV_NUM_W<APB_FREQ_CONF_SPEC> {
38        APB_DECREASE_DIV_NUM_W::new(self, 0)
39    }
40    #[doc = "Bits 8:15 - Set as one within (0,1,3) to generate clk_apb drived by clk_ahb. The clk_apb is div1(default)/div2/div4 of clk_ahb."]
41    #[inline(always)]
42    pub fn apb_div_num(&mut self) -> APB_DIV_NUM_W<APB_FREQ_CONF_SPEC> {
43        APB_DIV_NUM_W::new(self, 8)
44    }
45}
46#[doc = "APB_FREQ configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`apb_freq_conf::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`apb_freq_conf::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
47pub struct APB_FREQ_CONF_SPEC;
48impl crate::RegisterSpec for APB_FREQ_CONF_SPEC {
49    type Ux = u32;
50}
51#[doc = "`read()` method returns [`apb_freq_conf::R`](R) reader structure"]
52impl crate::Readable for APB_FREQ_CONF_SPEC {}
53#[doc = "`write(|w| ..)` method takes [`apb_freq_conf::W`](W) writer structure"]
54impl crate::Writable for APB_FREQ_CONF_SPEC {
55    type Safety = crate::Unsafe;
56    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
57    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
58}
59#[doc = "`reset()` method sets APB_FREQ_CONF to value 0"]
60impl crate::Resettable for APB_FREQ_CONF_SPEC {
61    const RESET_VALUE: u32 = 0;
62}
esp32h2/pcr/apb_freq_conf.rs

esp32h2/pcr/
apb_freq_conf.rs
