esp32h2/modem_lpcon/
mem_conf.rs

1#[doc = "Register `MEM_CONF` reader"]
2pub type R = crate::R<MEM_CONF_SPEC>;
3#[doc = "Register `MEM_CONF` writer"]
4pub type W = crate::W<MEM_CONF_SPEC>;
5#[doc = "Field `AGC_MEM_FORCE_PU` reader - "]
6pub type AGC_MEM_FORCE_PU_R = crate::BitReader;
7#[doc = "Field `AGC_MEM_FORCE_PU` writer - "]
8pub type AGC_MEM_FORCE_PU_W<'a, REG> = crate::BitWriter<'a, REG>;
9#[doc = "Field `AGC_MEM_FORCE_PD` reader - "]
10pub type AGC_MEM_FORCE_PD_R = crate::BitReader;
11#[doc = "Field `AGC_MEM_FORCE_PD` writer - "]
12pub type AGC_MEM_FORCE_PD_W<'a, REG> = crate::BitWriter<'a, REG>;
13#[doc = "Field `PBUS_MEM_FORCE_PU` reader - "]
14pub type PBUS_MEM_FORCE_PU_R = crate::BitReader;
15#[doc = "Field `PBUS_MEM_FORCE_PU` writer - "]
16pub type PBUS_MEM_FORCE_PU_W<'a, REG> = crate::BitWriter<'a, REG>;
17#[doc = "Field `PBUS_MEM_FORCE_PD` reader - "]
18pub type PBUS_MEM_FORCE_PD_R = crate::BitReader;
19#[doc = "Field `PBUS_MEM_FORCE_PD` writer - "]
20pub type PBUS_MEM_FORCE_PD_W<'a, REG> = crate::BitWriter<'a, REG>;
21#[doc = "Field `I2C_MST_MEM_FORCE_PU` reader - "]
22pub type I2C_MST_MEM_FORCE_PU_R = crate::BitReader;
23#[doc = "Field `I2C_MST_MEM_FORCE_PU` writer - "]
24pub type I2C_MST_MEM_FORCE_PU_W<'a, REG> = crate::BitWriter<'a, REG>;
25#[doc = "Field `I2C_MST_MEM_FORCE_PD` reader - "]
26pub type I2C_MST_MEM_FORCE_PD_R = crate::BitReader;
27#[doc = "Field `I2C_MST_MEM_FORCE_PD` writer - "]
28pub type I2C_MST_MEM_FORCE_PD_W<'a, REG> = crate::BitWriter<'a, REG>;
29#[doc = "Field `CHAN_FREQ_MEM_FORCE_PU` reader - "]
30pub type CHAN_FREQ_MEM_FORCE_PU_R = crate::BitReader;
31#[doc = "Field `CHAN_FREQ_MEM_FORCE_PU` writer - "]
32pub type CHAN_FREQ_MEM_FORCE_PU_W<'a, REG> = crate::BitWriter<'a, REG>;
33#[doc = "Field `CHAN_FREQ_MEM_FORCE_PD` reader - "]
34pub type CHAN_FREQ_MEM_FORCE_PD_R = crate::BitReader;
35#[doc = "Field `CHAN_FREQ_MEM_FORCE_PD` writer - "]
36pub type CHAN_FREQ_MEM_FORCE_PD_W<'a, REG> = crate::BitWriter<'a, REG>;
37#[doc = "Field `MODEM_PWR_MEM_WP` reader - "]
38pub type MODEM_PWR_MEM_WP_R = crate::FieldReader;
39#[doc = "Field `MODEM_PWR_MEM_WP` writer - "]
40pub type MODEM_PWR_MEM_WP_W<'a, REG> = crate::FieldWriter<'a, REG, 3>;
41#[doc = "Field `MODEM_PWR_MEM_WA` reader - "]
42pub type MODEM_PWR_MEM_WA_R = crate::FieldReader;
43#[doc = "Field `MODEM_PWR_MEM_WA` writer - "]
44pub type MODEM_PWR_MEM_WA_W<'a, REG> = crate::FieldWriter<'a, REG, 3>;
45#[doc = "Field `MODEM_PWR_MEM_RA` reader - "]
46pub type MODEM_PWR_MEM_RA_R = crate::FieldReader;
47#[doc = "Field `MODEM_PWR_MEM_RA` writer - "]
48pub type MODEM_PWR_MEM_RA_W<'a, REG> = crate::FieldWriter<'a, REG, 2>;
49#[doc = "Field `MODEM_PWR_MEM_RM` reader - "]
50pub type MODEM_PWR_MEM_RM_R = crate::FieldReader;
51#[doc = "Field `MODEM_PWR_MEM_RM` writer - "]
52pub type MODEM_PWR_MEM_RM_W<'a, REG> = crate::FieldWriter<'a, REG, 4>;
53impl R {
54    #[doc = "Bit 2"]
55    #[inline(always)]
56    pub fn agc_mem_force_pu(&self) -> AGC_MEM_FORCE_PU_R {
57        AGC_MEM_FORCE_PU_R::new(((self.bits >> 2) & 1) != 0)
58    }
59    #[doc = "Bit 3"]
60    #[inline(always)]
61    pub fn agc_mem_force_pd(&self) -> AGC_MEM_FORCE_PD_R {
62        AGC_MEM_FORCE_PD_R::new(((self.bits >> 3) & 1) != 0)
63    }
64    #[doc = "Bit 4"]
65    #[inline(always)]
66    pub fn pbus_mem_force_pu(&self) -> PBUS_MEM_FORCE_PU_R {
67        PBUS_MEM_FORCE_PU_R::new(((self.bits >> 4) & 1) != 0)
68    }
69    #[doc = "Bit 5"]
70    #[inline(always)]
71    pub fn pbus_mem_force_pd(&self) -> PBUS_MEM_FORCE_PD_R {
72        PBUS_MEM_FORCE_PD_R::new(((self.bits >> 5) & 1) != 0)
73    }
74    #[doc = "Bit 8"]
75    #[inline(always)]
76    pub fn i2c_mst_mem_force_pu(&self) -> I2C_MST_MEM_FORCE_PU_R {
77        I2C_MST_MEM_FORCE_PU_R::new(((self.bits >> 8) & 1) != 0)
78    }
79    #[doc = "Bit 9"]
80    #[inline(always)]
81    pub fn i2c_mst_mem_force_pd(&self) -> I2C_MST_MEM_FORCE_PD_R {
82        I2C_MST_MEM_FORCE_PD_R::new(((self.bits >> 9) & 1) != 0)
83    }
84    #[doc = "Bit 10"]
85    #[inline(always)]
86    pub fn chan_freq_mem_force_pu(&self) -> CHAN_FREQ_MEM_FORCE_PU_R {
87        CHAN_FREQ_MEM_FORCE_PU_R::new(((self.bits >> 10) & 1) != 0)
88    }
89    #[doc = "Bit 11"]
90    #[inline(always)]
91    pub fn chan_freq_mem_force_pd(&self) -> CHAN_FREQ_MEM_FORCE_PD_R {
92        CHAN_FREQ_MEM_FORCE_PD_R::new(((self.bits >> 11) & 1) != 0)
93    }
94    #[doc = "Bits 12:14"]
95    #[inline(always)]
96    pub fn modem_pwr_mem_wp(&self) -> MODEM_PWR_MEM_WP_R {
97        MODEM_PWR_MEM_WP_R::new(((self.bits >> 12) & 7) as u8)
98    }
99    #[doc = "Bits 15:17"]
100    #[inline(always)]
101    pub fn modem_pwr_mem_wa(&self) -> MODEM_PWR_MEM_WA_R {
102        MODEM_PWR_MEM_WA_R::new(((self.bits >> 15) & 7) as u8)
103    }
104    #[doc = "Bits 18:19"]
105    #[inline(always)]
106    pub fn modem_pwr_mem_ra(&self) -> MODEM_PWR_MEM_RA_R {
107        MODEM_PWR_MEM_RA_R::new(((self.bits >> 18) & 3) as u8)
108    }
109    #[doc = "Bits 20:23"]
110    #[inline(always)]
111    pub fn modem_pwr_mem_rm(&self) -> MODEM_PWR_MEM_RM_R {
112        MODEM_PWR_MEM_RM_R::new(((self.bits >> 20) & 0x0f) as u8)
113    }
114}
115#[cfg(feature = "impl-register-debug")]
116impl core::fmt::Debug for R {
117    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
118        f.debug_struct("MEM_CONF")
119            .field("agc_mem_force_pu", &self.agc_mem_force_pu())
120            .field("agc_mem_force_pd", &self.agc_mem_force_pd())
121            .field("pbus_mem_force_pu", &self.pbus_mem_force_pu())
122            .field("pbus_mem_force_pd", &self.pbus_mem_force_pd())
123            .field("i2c_mst_mem_force_pu", &self.i2c_mst_mem_force_pu())
124            .field("i2c_mst_mem_force_pd", &self.i2c_mst_mem_force_pd())
125            .field("chan_freq_mem_force_pu", &self.chan_freq_mem_force_pu())
126            .field("chan_freq_mem_force_pd", &self.chan_freq_mem_force_pd())
127            .field("modem_pwr_mem_wp", &self.modem_pwr_mem_wp())
128            .field("modem_pwr_mem_wa", &self.modem_pwr_mem_wa())
129            .field("modem_pwr_mem_ra", &self.modem_pwr_mem_ra())
130            .field("modem_pwr_mem_rm", &self.modem_pwr_mem_rm())
131            .finish()
132    }
133}
134impl W {
135    #[doc = "Bit 2"]
136    #[inline(always)]
137    pub fn agc_mem_force_pu(&mut self) -> AGC_MEM_FORCE_PU_W<MEM_CONF_SPEC> {
138        AGC_MEM_FORCE_PU_W::new(self, 2)
139    }
140    #[doc = "Bit 3"]
141    #[inline(always)]
142    pub fn agc_mem_force_pd(&mut self) -> AGC_MEM_FORCE_PD_W<MEM_CONF_SPEC> {
143        AGC_MEM_FORCE_PD_W::new(self, 3)
144    }
145    #[doc = "Bit 4"]
146    #[inline(always)]
147    pub fn pbus_mem_force_pu(&mut self) -> PBUS_MEM_FORCE_PU_W<MEM_CONF_SPEC> {
148        PBUS_MEM_FORCE_PU_W::new(self, 4)
149    }
150    #[doc = "Bit 5"]
151    #[inline(always)]
152    pub fn pbus_mem_force_pd(&mut self) -> PBUS_MEM_FORCE_PD_W<MEM_CONF_SPEC> {
153        PBUS_MEM_FORCE_PD_W::new(self, 5)
154    }
155    #[doc = "Bit 8"]
156    #[inline(always)]
157    pub fn i2c_mst_mem_force_pu(&mut self) -> I2C_MST_MEM_FORCE_PU_W<MEM_CONF_SPEC> {
158        I2C_MST_MEM_FORCE_PU_W::new(self, 8)
159    }
160    #[doc = "Bit 9"]
161    #[inline(always)]
162    pub fn i2c_mst_mem_force_pd(&mut self) -> I2C_MST_MEM_FORCE_PD_W<MEM_CONF_SPEC> {
163        I2C_MST_MEM_FORCE_PD_W::new(self, 9)
164    }
165    #[doc = "Bit 10"]
166    #[inline(always)]
167    pub fn chan_freq_mem_force_pu(&mut self) -> CHAN_FREQ_MEM_FORCE_PU_W<MEM_CONF_SPEC> {
168        CHAN_FREQ_MEM_FORCE_PU_W::new(self, 10)
169    }
170    #[doc = "Bit 11"]
171    #[inline(always)]
172    pub fn chan_freq_mem_force_pd(&mut self) -> CHAN_FREQ_MEM_FORCE_PD_W<MEM_CONF_SPEC> {
173        CHAN_FREQ_MEM_FORCE_PD_W::new(self, 11)
174    }
175    #[doc = "Bits 12:14"]
176    #[inline(always)]
177    pub fn modem_pwr_mem_wp(&mut self) -> MODEM_PWR_MEM_WP_W<MEM_CONF_SPEC> {
178        MODEM_PWR_MEM_WP_W::new(self, 12)
179    }
180    #[doc = "Bits 15:17"]
181    #[inline(always)]
182    pub fn modem_pwr_mem_wa(&mut self) -> MODEM_PWR_MEM_WA_W<MEM_CONF_SPEC> {
183        MODEM_PWR_MEM_WA_W::new(self, 15)
184    }
185    #[doc = "Bits 18:19"]
186    #[inline(always)]
187    pub fn modem_pwr_mem_ra(&mut self) -> MODEM_PWR_MEM_RA_W<MEM_CONF_SPEC> {
188        MODEM_PWR_MEM_RA_W::new(self, 18)
189    }
190    #[doc = "Bits 20:23"]
191    #[inline(always)]
192    pub fn modem_pwr_mem_rm(&mut self) -> MODEM_PWR_MEM_RM_W<MEM_CONF_SPEC> {
193        MODEM_PWR_MEM_RM_W::new(self, 20)
194    }
195}
196#[doc = "\n\nYou can [`read`](crate::Reg::read) this register and get [`mem_conf::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mem_conf::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
197pub struct MEM_CONF_SPEC;
198impl crate::RegisterSpec for MEM_CONF_SPEC {
199    type Ux = u32;
200}
201#[doc = "`read()` method returns [`mem_conf::R`](R) reader structure"]
202impl crate::Readable for MEM_CONF_SPEC {}
203#[doc = "`write(|w| ..)` method takes [`mem_conf::W`](W) writer structure"]
204impl crate::Writable for MEM_CONF_SPEC {
205    type Safety = crate::Unsafe;
206    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
207    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
208}
209#[doc = "`reset()` method sets MEM_CONF to value 0x0022_8014"]
210impl crate::Resettable for MEM_CONF_SPEC {
211    const RESET_VALUE: u32 = 0x0022_8014;
212}
esp32h2/modem_lpcon/mem_conf.rs

esp32h2/modem_lpcon/
mem_conf.rs
