esp32h2::pcr::parl_clk_tx_conf

Type Alias R

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pub type R = R<PARL_CLK_TX_CONF_SPEC>;
Expand description

Register PARL_CLK_TX_CONF reader

Aliased Type§

struct R { /* private fields */ }

Implementations§

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impl R

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pub fn parl_clk_tx_div_num(&self) -> PARL_CLK_TX_DIV_NUM_R

Bits 0:15 - The integral part of the frequency divider factor of the parl tx clock.

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pub fn parl_clk_tx_sel(&self) -> PARL_CLK_TX_SEL_R

Bits 16:17 - set this field to select clock-source. 0(default): XTAL, 1: 240MHz, 2: FOSC, 3: user clock from pad.

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pub fn parl_clk_tx_en(&self) -> PARL_CLK_TX_EN_R

Bit 18 - Set 1 to enable parl tx clock

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pub fn parl_tx_rst_en(&self) -> PARL_TX_RST_EN_R

Bit 19 - Set 0 to reset parl tx module