Module esp32h2::spi0::user

SPI0 user register.

Structs

• USER_SPEC
  SPI0 user register.

Type Aliases

• CK_OUT_EDGE_R
  Field CK_OUT_EDGE reader - The bit combined with SPI_MEM_CK_IDLE_EDGE bit to control SPI clock mode 0~3.
• CK_OUT_EDGE_W
  Field CK_OUT_EDGE writer - The bit combined with SPI_MEM_CK_IDLE_EDGE bit to control SPI clock mode 0~3.
• CS_HOLD_R
  Field CS_HOLD reader - spi cs keep low when spi is in done phase. 1: enable 0: disable.
• CS_HOLD_W
  Field CS_HOLD writer - spi cs keep low when spi is in done phase. 1: enable 0: disable.
• CS_SETUP_R
  Field CS_SETUP reader - spi cs is enable when spi is in prepare phase. 1: enable 0: disable.
• CS_SETUP_W
  Field CS_SETUP writer - spi cs is enable when spi is in prepare phase. 1: enable 0: disable.
• R
  Register USER reader
• USR_DUMMY_IDLE_R
  Field USR_DUMMY_IDLE reader - spi clock is disable in dummy phase when the bit is enable.
• USR_DUMMY_IDLE_W
  Field USR_DUMMY_IDLE writer - spi clock is disable in dummy phase when the bit is enable.
• USR_DUMMY_R
  Field USR_DUMMY reader - This bit enable the dummy phase of an operation.
• USR_DUMMY_W
  Field USR_DUMMY writer - This bit enable the dummy phase of an operation.
• W
  Register USER writer