Type Alias esp32h2::rmt::int_raw::W

pub type W = W<INT_RAW_SPEC>;

Register INT_RAW writer

Aliased Type

struct W { /* private fields */ }

Implementations

impl W

pub fn ch_tx_end(&mut self, n: u8) -> CH_TX_END_W<'_, INT_RAW_SPEC>

The interrupt raw bit for CHANNEL(0-1). Triggered when transmission done.

`n` is number of field in register. `n == 0` corresponds to `CH0_TX_END` field.

pub fn ch0_tx_end(&mut self) -> CH_TX_END_W<'_, INT_RAW_SPEC>

Bit 0 - The interrupt raw bit for CHANNEL0. Triggered when transmission done.

pub fn ch1_tx_end(&mut self) -> CH_TX_END_W<'_, INT_RAW_SPEC>

Bit 1 - The interrupt raw bit for CHANNEL1. Triggered when transmission done.

pub fn ch_rx_end(&mut self, n: u8) -> CH_RX_END_W<'_, INT_RAW_SPEC>

The interrupt raw bit for CHANNEL2. Triggered when reception done.

`n` is number of field in register. `n == 0` corresponds to `CH2_RX_END` field.

pub fn ch2_rx_end(&mut self) -> CH_RX_END_W<'_, INT_RAW_SPEC>

Bit 2 - The interrupt raw bit for CHANNEL2. Triggered when reception done.

pub fn ch3_rx_end(&mut self) -> CH_RX_END_W<'_, INT_RAW_SPEC>

Bit 3 - The interrupt raw bit for CHANNEL2. Triggered when reception done.

pub fn ch_tx_err(&mut self, n: u8) -> CH_TX_ERR_W<'_, INT_RAW_SPEC>

The interrupt raw bit for CHANNEL4. Triggered when error occurs.

`n` is number of field in register. `n == 0` corresponds to `CH0_TX_ERR` field.

pub fn ch0_tx_err(&mut self) -> CH_TX_ERR_W<'_, INT_RAW_SPEC>

Bit 4 - The interrupt raw bit for CHANNEL4. Triggered when error occurs.

pub fn ch1_tx_err(&mut self) -> CH_TX_ERR_W<'_, INT_RAW_SPEC>

Bit 5 - The interrupt raw bit for CHANNEL4. Triggered when error occurs.

pub fn ch_rx_err(&mut self, n: u8) -> CH_RX_ERR_W<'_, INT_RAW_SPEC>

The interrupt raw bit for CHANNEL6. Triggered when error occurs.

`n` is number of field in register. `n == 0` corresponds to `CH2_RX_ERR` field.

pub fn ch2_rx_err(&mut self) -> CH_RX_ERR_W<'_, INT_RAW_SPEC>

Bit 6 - The interrupt raw bit for CHANNEL6. Triggered when error occurs.

pub fn ch3_rx_err(&mut self) -> CH_RX_ERR_W<'_, INT_RAW_SPEC>

Bit 7 - The interrupt raw bit for CHANNEL6. Triggered when error occurs.

pub fn ch_tx_thr_event(&mut self, n: u8) -> CH_TX_THR_EVENT_W<'_, INT_RAW_SPEC>

The interrupt raw bit for CHANNEL(0-1). Triggered when transmitter sent more data than configured value.

`n` is number of field in register. `n == 0` corresponds to `CH0_TX_THR_EVENT` field.

pub fn ch0_tx_thr_event(&mut self) -> CH_TX_THR_EVENT_W<'_, INT_RAW_SPEC>

Bit 8 - The interrupt raw bit for CHANNEL0. Triggered when transmitter sent more data than configured value.

pub fn ch1_tx_thr_event(&mut self) -> CH_TX_THR_EVENT_W<'_, INT_RAW_SPEC>

Bit 9 - The interrupt raw bit for CHANNEL1. Triggered when transmitter sent more data than configured value.

pub fn ch_rx_thr_event(&mut self, n: u8) -> CH_RX_THR_EVENT_W<'_, INT_RAW_SPEC>

The interrupt raw bit for CHANNEL2. Triggered when receiver receive more data than configured value.

`n` is number of field in register. `n == 0` corresponds to `CH2_RX_THR_EVENT` field.

pub fn ch2_rx_thr_event(&mut self) -> CH_RX_THR_EVENT_W<'_, INT_RAW_SPEC>

Bit 10 - The interrupt raw bit for CHANNEL2. Triggered when receiver receive more data than configured value.

pub fn ch3_rx_thr_event(&mut self) -> CH_RX_THR_EVENT_W<'_, INT_RAW_SPEC>

Bit 11 - The interrupt raw bit for CHANNEL2. Triggered when receiver receive more data than configured value.

pub fn ch_tx_loop(&mut self, n: u8) -> CH_TX_LOOP_W<'_, INT_RAW_SPEC>

The interrupt raw bit for CHANNEL(0-1). Triggered when the loop count reaches the configured threshold value.

`n` is number of field in register. `n == 0` corresponds to `CH0_TX_LOOP` field.

pub fn ch0_tx_loop(&mut self) -> CH_TX_LOOP_W<'_, INT_RAW_SPEC>

Bit 12 - The interrupt raw bit for CHANNEL0. Triggered when the loop count reaches the configured threshold value.

pub fn ch1_tx_loop(&mut self) -> CH_TX_LOOP_W<'_, INT_RAW_SPEC>

Bit 13 - The interrupt raw bit for CHANNEL1. Triggered when the loop count reaches the configured threshold value.