Module esp32h2::uart0::conf1

Configuration register 1

Structs

• CONF1_SPEC
  Configuration register 1

Type Aliases

• CLK_EN_R
  Field CLK_EN reader - 1’h1: Force clock on for register. 1’h0: Support clock only when application writes registers.
• CLK_EN_W
  Field CLK_EN writer - 1’h1: Force clock on for register. 1’h0: Support clock only when application writes registers.
• CTS_INV_R
  Field CTS_INV reader - Set this bit to inverse the level value of uart cts signal.
• CTS_INV_W
  Field CTS_INV writer - Set this bit to inverse the level value of uart cts signal.
• DSR_INV_R
  Field DSR_INV reader - Set this bit to inverse the level value of uart dsr signal.
• DSR_INV_W
  Field DSR_INV writer - Set this bit to inverse the level value of uart dsr signal.
• DTR_INV_R
  Field DTR_INV reader - Set this bit to inverse the level value of uart dtr signal.
• DTR_INV_W
  Field DTR_INV writer - Set this bit to inverse the level value of uart dtr signal.
• R
  Register CONF1 reader
• RTS_INV_R
  Field RTS_INV reader - Set this bit to inverse the level value of uart rts signal.
• RTS_INV_W
  Field RTS_INV writer - Set this bit to inverse the level value of uart rts signal.
• RXFIFO_FULL_THRHD_R
  Field RXFIFO_FULL_THRHD reader - It will produce rxfifo_full_int interrupt when receiver receives more data than this register value.
• RXFIFO_FULL_THRHD_W
  Field RXFIFO_FULL_THRHD writer - It will produce rxfifo_full_int interrupt when receiver receives more data than this register value.
• SW_DTR_R
  Field SW_DTR reader - This register is used to configure the software dtr signal which is used in software flow control.
• SW_DTR_W
  Field SW_DTR writer - This register is used to configure the software dtr signal which is used in software flow control.
• TXFIFO_EMPTY_THRHD_R
  Field TXFIFO_EMPTY_THRHD reader - It will produce txfifo_empty_int interrupt when the data amount in Tx-FIFO is less than this register value.
• TXFIFO_EMPTY_THRHD_W
  Field TXFIFO_EMPTY_THRHD writer - It will produce txfifo_empty_int interrupt when the data amount in Tx-FIFO is less than this register value.
• W
  Register CONF1 writer