Expand description
GPIO pin configuration register
Structs§
- GPIO pin configuration register
Type Aliases§
- FieldCONFIGreader - reserved
- FieldCONFIGwriter - reserved
- FieldINT_ENAreader - set bit 13 to enable CPU interrupt. set bit 14 to enable CPU(not shielded) interrupt.
- FieldINT_ENAwriter - set bit 13 to enable CPU interrupt. set bit 14 to enable CPU(not shielded) interrupt.
- FieldINT_TYPEreader - set this value to choose interrupt mode. 0:disable GPIO interrupt. 1:trigger at posedge. 2:trigger at negedge. 3:trigger at any edge. 4:valid at low level. 5:valid at high level
- FieldINT_TYPEwriter - set this value to choose interrupt mode. 0:disable GPIO interrupt. 1:trigger at posedge. 2:trigger at negedge. 3:trigger at any edge. 4:valid at low level. 5:valid at high level
- FieldPAD_DRIVERreader - set this bit to select pad driver. 1:open-drain. 0:normal.
- FieldPAD_DRIVERwriter - set this bit to select pad driver. 1:open-drain. 0:normal.
- RegisterPIN%sreader
- FieldSYNC1_BYPASSreader - set GPIO input_sync1 signal mode. 0:disable. 1:trigger at negedge. 2or3:trigger at posedge.
- FieldSYNC1_BYPASSwriter - set GPIO input_sync1 signal mode. 0:disable. 1:trigger at negedge. 2or3:trigger at posedge.
- FieldSYNC2_BYPASSreader - set GPIO input_sync2 signal mode. 0:disable. 1:trigger at negedge. 2or3:trigger at posedge.
- FieldSYNC2_BYPASSwriter - set GPIO input_sync2 signal mode. 0:disable. 1:trigger at negedge. 2or3:trigger at posedge.
- RegisterPIN%swriter
- FieldWAKEUP_ENABLEreader - set this bit to enable GPIO wakeup.(can only wakeup CPU from Light-sleep Mode)
- FieldWAKEUP_ENABLEwriter - set this bit to enable GPIO wakeup.(can only wakeup CPU from Light-sleep Mode)