Trait Instance

pub trait Instance {
    // Required methods
    fn scl_output_signal(&self) -> OutputSignal;
    fn scl_input_signal(&self) -> InputSignal;
    fn sda_output_signal(&self) -> OutputSignal;
    fn sda_input_signal(&self) -> InputSignal;
    fn register_block(&self) -> &RegisterBlock;
    fn i2c_number(&self) -> usize;

    // Provided methods
    fn setup(
        &mut self,
        frequency: Rate<u32, 1, 1>,
        clocks: &Clocks<'_>,
        timeout: Option<u32>,
    ) { ... }
    fn reset(&self) { ... }
    fn reset_command_list(&self) { ... }
    fn set_filter(
        &mut self,
        sda_threshold: Option<u8>,
        scl_threshold: Option<u8>,
    ) { ... }
    fn set_frequency(
        &mut self,
        source_clk: Rate<u32, 1, 1>,
        bus_freq: Rate<u32, 1, 1>,
        timeout: Option<u32>,
    ) { ... }
    fn configure_clock(
        &mut self,
        sclk_div: u32,
        scl_low_period: u32,
        scl_high_period: u32,
        scl_wait_high_period: u32,
        sda_hold_time: u32,
        sda_sample_time: u32,
        scl_rstart_setup_time: u32,
        scl_stop_setup_time: u32,
        scl_start_hold_time: u32,
        scl_stop_hold_time: u32,
        time_out_value: u32,
        time_out_en: bool,
    ) { ... }
    fn setup_write<'a, I>(
        &self,
        addr: u8,
        bytes: &[u8],
        cmd_iterator: &mut I,
    ) -> Result<(), Error>
       where I: Iterator<Item = &'a Reg<COMD_SPEC>> { ... }
    fn perform_write<'a, I>(
        &self,
        addr: u8,
        bytes: &[u8],
        cmd_iterator: &mut I,
    ) -> Result<(), Error>
       where I: Iterator<Item = &'a Reg<COMD_SPEC>> { ... }
    fn setup_read<'a, I>(
        &self,
        addr: u8,
        buffer: &mut [u8],
        cmd_iterator: &mut I,
    ) -> Result<(), Error>
       where I: Iterator<Item = &'a Reg<COMD_SPEC>> { ... }
    fn perform_read<'a, I>(
        &self,
        addr: u8,
        buffer: &mut [u8],
        cmd_iterator: &mut I,
    ) -> Result<(), Error>
       where I: Iterator<Item = &'a Reg<COMD_SPEC>> { ... }
    fn read_all_from_fifo(&self, buffer: &mut [u8]) -> Result<(), Error> { ... }
    fn clear_all_interrupts(&self) { ... }
    fn wait_for_completion(&self) -> Result<(), Error> { ... }
    fn check_errors(&self) -> Result<(), Error> { ... }
    fn update_config(&self) { ... }
    fn start_transmission(&self) { ... }
    fn fill_tx_fifo(&self, bytes: &[u8]) -> usize { ... }
    fn write_remaining_tx_fifo(
        &self,
        start_index: usize,
        bytes: &[u8],
    ) -> Result<(), Error> { ... }
    fn reset_fifo(&self) { ... }
    fn master_write(&mut self, addr: u8, bytes: &[u8]) -> Result<(), Error> { ... }
    fn master_read(&mut self, addr: u8, buffer: &mut [u8]) -> Result<(), Error> { ... }
    fn master_write_read(
        &mut self,
        addr: u8,
        bytes: &[u8],
        buffer: &mut [u8],
    ) -> Result<(), Error> { ... }
}

I2C Peripheral Instance

Required Methods

fn scl_output_signal(&self) -> OutputSignal

fn scl_input_signal(&self) -> InputSignal

fn sda_output_signal(&self) -> OutputSignal

fn sda_input_signal(&self) -> InputSignal

fn register_block(&self) -> &RegisterBlock

fn i2c_number(&self) -> usize

Provided Methods

fn setup( &mut self, frequency: Rate<u32, 1, 1>, clocks: &Clocks<'_>, timeout: Option<u32>, )

fn reset(&self)

Resets the I2C controller (FIFO + FSM + command list)

fn reset_command_list(&self)

Resets the I2C peripheral’s command registers

fn set_filter(&mut self, sda_threshold: Option<u8>, scl_threshold: Option<u8>)

Sets the filter with a supplied threshold in clock cycles for which a pulse must be present to pass the filter

fn set_frequency( &mut self, source_clk: Rate<u32, 1, 1>, bus_freq: Rate<u32, 1, 1>, timeout: Option<u32>, )

Sets the frequency of the I2C interface by calculating and applying the associated timings - corresponds to i2c_ll_cal_bus_clk and i2c_ll_set_bus_timing in ESP-IDF

fn configure_clock( &mut self, sclk_div: u32, scl_low_period: u32, scl_high_period: u32, scl_wait_high_period: u32, sda_hold_time: u32, sda_sample_time: u32, scl_rstart_setup_time: u32, scl_stop_setup_time: u32, scl_start_hold_time: u32, scl_stop_hold_time: u32, time_out_value: u32, time_out_en: bool, )

fn setup_write<'a, I>( &self, addr: u8, bytes: &[u8], cmd_iterator: &mut I, ) -> Result<(), Error>

where I: Iterator<Item = &'a Reg<COMD_SPEC>>,

fn perform_write<'a, I>( &self, addr: u8, bytes: &[u8], cmd_iterator: &mut I, ) -> Result<(), Error>

where I: Iterator<Item = &'a Reg<COMD_SPEC>>,

fn setup_read<'a, I>( &self, addr: u8, buffer: &mut [u8], cmd_iterator: &mut I, ) -> Result<(), Error>

where I: Iterator<Item = &'a Reg<COMD_SPEC>>,

fn perform_read<'a, I>( &self, addr: u8, buffer: &mut [u8], cmd_iterator: &mut I, ) -> Result<(), Error>

where I: Iterator<Item = &'a Reg<COMD_SPEC>>,

fn read_all_from_fifo(&self, buffer: &mut [u8]) -> Result<(), Error>

fn clear_all_interrupts(&self)

fn wait_for_completion(&self) -> Result<(), Error>

fn check_errors(&self) -> Result<(), Error>

fn update_config(&self)

fn start_transmission(&self)

fn fill_tx_fifo(&self, bytes: &[u8]) -> usize

fn write_remaining_tx_fifo( &self, start_index: usize, bytes: &[u8], ) -> Result<(), Error>

fn reset_fifo(&self)

Resets the transmit and receive FIFO buffers

fn master_write(&mut self, addr: u8, bytes: &[u8]) -> Result<(), Error>

Send data bytes from the bytes array to a target slave with the address addr

fn master_read(&mut self, addr: u8, buffer: &mut [u8]) -> Result<(), Error>

Read bytes from a target slave with the address addr The number of read bytes is deterimed by the size of the buffer argument

fn master_write_read( &mut self, addr: u8, bytes: &[u8], buffer: &mut [u8], ) -> Result<(), Error>

Write bytes from the bytes array first and then read n bytes into the buffer array with n being the size of the array.

Dyn Compatibility

This trait is not dyn compatible.

In older versions of Rust, dyn compatibility was called "object safety", so this trait is not object safe.

Implementors

impl Instance for I2C0

impl Instance for I2C1