pub enum OutputSignal {
Show 93 variants
LEDC_LS_SIG0 = 0,
LEDC_LS_SIG1 = 1,
LEDC_LS_SIG2 = 2,
LEDC_LS_SIG3 = 3,
LEDC_LS_SIG4 = 4,
LEDC_LS_SIG5 = 5,
U0TXD = 6,
U0RTS = 7,
U0DTR = 8,
U1TXD = 9,
U1RTS = 10,
U1DTR = 11,
I2S_MCLK = 12,
I2SO_BCK = 13,
I2SO_WS = 14,
I2SO_SD = 15,
I2SI_BCK = 16,
I2SI_WS = 17,
I2SO_SD1 = 18,
USB_JTAG_TRST = 19,
CPU_GPIO_OUT0 = 28,
CPU_GPIO_OUT1 = 29,
CPU_GPIO_OUT2 = 30,
CPU_GPIO_OUT3 = 31,
CPU_GPIO_OUT4 = 32,
CPU_GPIO_OUT5 = 33,
CPU_GPIO_OUT6 = 34,
CPU_GPIO_OUT7 = 35,
I2CEXT0_SCL = 45,
I2CEXT0_SDA = 46,
PARL_TX_DATA0 = 47,
PARL_TX_DATA1 = 48,
PARL_TX_DATA2 = 49,
PARL_TX_DATA3 = 50,
PARL_TX_DATA4 = 51,
PARL_TX_DATA5 = 52,
PARL_TX_DATA6 = 53,
PARL_TX_DATA7 = 54,
I2CEXT1_SCL = 55,
I2CEXT1_SDA = 56,
FSPICLK_MUX = 63,
FSPIQ = 64,
FSPID = 65,
FSPIHD = 66,
FSPIWP = 67,
FSPICS0 = 68,
PARL_RX_CLK = 69,
PARL_TX_CLK = 70,
RMT_SIG_0 = 71,
RMT_SIG_1 = 72,
TWAI0_TX = 73,
TWAI0_BUS_OFF_ON = 74,
TWAI0_CLKOUT = 75,
TWAI0_STANDBY = 76,
CTE_ANT7 = 78,
CTE_ANT8 = 79,
CTE_ANT9 = 80,
GPIO_SD0 = 83,
GPIO_SD1 = 84,
GPIO_SD2 = 85,
GPIO_SD3 = 86,
PWM0_0A = 87,
PWM0_0B = 88,
PWM0_1A = 89,
PWM0_1B = 90,
PWM0_2A = 91,
PWM0_2B = 92,
SIG_IN_FUNC97 = 97,
SIG_IN_FUNC98 = 98,
SIG_IN_FUNC99 = 99,
SIG_IN_FUNC100 = 100,
FSPICS1 = 101,
FSPICS2 = 102,
FSPICS3 = 103,
FSPICS4 = 104,
FSPICS5 = 105,
CTE_ANT10 = 106,
CTE_ANT11 = 107,
CTE_ANT12 = 108,
CTE_ANT13 = 109,
CTE_ANT14 = 110,
CTE_ANT15 = 111,
SPICLK = 114,
SPICS0 = 115,
SPICS1 = 116,
SPIQ = 121,
SPID = 122,
SPIHD = 123,
SPIWP = 124,
CLK_OUT_OUT1 = 125,
CLK_OUT_OUT2 = 126,
CLK_OUT_OUT3 = 127,
GPIO = 128,
}
Expand description
Peripheral input signals for the GPIO mux
Variants§
LEDC_LS_SIG0 = 0
LEDC_LS_SIG1 = 1
LEDC_LS_SIG2 = 2
LEDC_LS_SIG3 = 3
LEDC_LS_SIG4 = 4
LEDC_LS_SIG5 = 5
U0TXD = 6
U0RTS = 7
U0DTR = 8
U1TXD = 9
U1RTS = 10
U1DTR = 11
I2S_MCLK = 12
I2SO_BCK = 13
I2SO_WS = 14
I2SO_SD = 15
I2SI_BCK = 16
I2SI_WS = 17
I2SO_SD1 = 18
USB_JTAG_TRST = 19
CPU_GPIO_OUT0 = 28
CPU_GPIO_OUT1 = 29
CPU_GPIO_OUT2 = 30
CPU_GPIO_OUT3 = 31
CPU_GPIO_OUT4 = 32
CPU_GPIO_OUT5 = 33
CPU_GPIO_OUT6 = 34
CPU_GPIO_OUT7 = 35
I2CEXT0_SCL = 45
I2CEXT0_SDA = 46
PARL_TX_DATA0 = 47
PARL_TX_DATA1 = 48
PARL_TX_DATA2 = 49
PARL_TX_DATA3 = 50
PARL_TX_DATA4 = 51
PARL_TX_DATA5 = 52
PARL_TX_DATA6 = 53
PARL_TX_DATA7 = 54
I2CEXT1_SCL = 55
I2CEXT1_SDA = 56
FSPICLK_MUX = 63
FSPIQ = 64
FSPID = 65
FSPIHD = 66
FSPIWP = 67
FSPICS0 = 68
PARL_RX_CLK = 69
PARL_TX_CLK = 70
RMT_SIG_0 = 71
RMT_SIG_1 = 72
TWAI0_TX = 73
TWAI0_BUS_OFF_ON = 74
TWAI0_CLKOUT = 75
TWAI0_STANDBY = 76
CTE_ANT7 = 78
CTE_ANT8 = 79
CTE_ANT9 = 80
GPIO_SD0 = 83
GPIO_SD1 = 84
GPIO_SD2 = 85
GPIO_SD3 = 86
PWM0_0A = 87
PWM0_0B = 88
PWM0_1A = 89
PWM0_1B = 90
PWM0_2A = 91
PWM0_2B = 92
SIG_IN_FUNC97 = 97
SIG_IN_FUNC98 = 98
SIG_IN_FUNC99 = 99
SIG_IN_FUNC100 = 100
FSPICS1 = 101
FSPICS2 = 102
FSPICS3 = 103
FSPICS4 = 104
FSPICS5 = 105
CTE_ANT10 = 106
CTE_ANT11 = 107
CTE_ANT12 = 108
CTE_ANT13 = 109
CTE_ANT14 = 110
CTE_ANT15 = 111
SPICLK = 114
SPICS0 = 115
SPICS1 = 116
SPIQ = 121
SPID = 122
SPIHD = 123
SPIWP = 124
CLK_OUT_OUT1 = 125
CLK_OUT_OUT2 = 126
CLK_OUT_OUT3 = 127
GPIO = 128
Trait Implementations§
Source§impl Clone for OutputSignal
impl Clone for OutputSignal
Source§fn clone(&self) -> OutputSignal
fn clone(&self) -> OutputSignal
Returns a copy of the value. Read more
1.0.0 · Source§fn clone_from(&mut self, source: &Self)
fn clone_from(&mut self, source: &Self)
Performs copy-assignment from
source
. Read moreSource§impl PartialEq for OutputSignal
impl PartialEq for OutputSignal
impl Copy for OutputSignal
impl StructuralPartialEq for OutputSignal
Auto Trait Implementations§
impl Freeze for OutputSignal
impl RefUnwindSafe for OutputSignal
impl Send for OutputSignal
impl Sync for OutputSignal
impl Unpin for OutputSignal
impl UnwindSafe for OutputSignal
Blanket Implementations§
Source§impl<T> BorrowMut<T> for Twhere
T: ?Sized,
impl<T> BorrowMut<T> for Twhere
T: ?Sized,
Source§fn borrow_mut(&mut self) -> &mut T
fn borrow_mut(&mut self) -> &mut T
Mutably borrows from an owned value. Read more