Type Alias W

pub type W = W<CTRL2_SPEC>;

Register CTRL2 writer

Aliased Type

pub struct W { /* private fields */ }

Implementations

impl W

pub fn cs_setup_time(&mut self) -> CS_SETUP_TIME_W<'_, CTRL2_SPEC>

Bits 0:4 - (cycles-1) of prepare phase by SPI Bus clock, this bits are combined with SPI_MEM_CS_SETUP bit.

pub fn cs_hold_time(&mut self) -> CS_HOLD_TIME_W<'_, CTRL2_SPEC>

Bits 5:9 - SPI CS signal is delayed to inactive by SPI bus clock, this bits are combined with SPI_MEM_CS_HOLD bit.

pub fn cs_hold_delay(&mut self) -> CS_HOLD_DELAY_W<'_, CTRL2_SPEC>

Bits 25:30 - These bits are used to set the minimum CS high time tSHSL between SPI burst transfer when accesses to flash. tSHSL is (SPI_MEM_CS_HOLD_DELAY[5:0] + 1) MSPI core clock cycles.

pub fn sync_reset(&mut self) -> SYNC_RESET_W<'_, CTRL2_SPEC>

Bit 31 - The spi0_mst_st and spi0_slv_st will be reset.