Type Alias esp32c6::uhci0::int_raw::R

pub type R = R<INT_RAW_SPEC>;

Register INT_RAW reader

Aliased Type

struct R { /* private fields */ }

Implementations

impl R

pub fn rx_start_int_raw(&self) -> RX_START_INT_RAW_R

Bit 0 - Indicates the raw interrupt of UHCI_RX_START_INT. Interrupt will be triggered when delimiter is sent successfully.

pub fn tx_start_int_raw(&self) -> TX_START_INT_RAW_R

Bit 1 - Indicates the raw interrupt of UHCI_TX_START_INT. Interrupt will be triggered when DMA detects delimiter.

pub fn rx_hung_int_raw(&self) -> RX_HUNG_INT_RAW_R

Bit 2 - Indicates the raw interrupt of UHCI_RX_HUNG_INT. Interrupt will be triggered when the required time of DMA receiving data exceeds the configuration value.

pub fn tx_hung_int_raw(&self) -> TX_HUNG_INT_RAW_R

Bit 3 - Indicates the raw interrupt of UHCI_TX_HUNG_INT. Interrupt will be triggered when the required time of DMA reading RAM data exceeds the configuration value.

pub fn send_s_reg_q_int_raw(&self) -> SEND_S_REG_Q_INT_RAW_R

Bit 4 - Indicates the raw interrupt of UHCI_SEND_S_REG_Q_INT. Interrupt will be triggered when UHCI sends short packet successfully with single_send mode.

pub fn send_a_reg_q_int_raw(&self) -> SEND_A_REG_Q_INT_RAW_R

Bit 5 - Indicates the raw interrupt of UHCI_SEND_A_REG_Q_INT. Interrupt will be triggered when UHCI sends short packet successfully with always_send mode.

pub fn out_eof_int_raw(&self) -> OUT_EOF_INT_RAW_R

Bit 6 - Indicates the raw interrupt of UHCI_OUT_EOF_INT. Interrupt will be triggered when there are errors in EOF.

pub fn app_ctrl0_int_raw(&self) -> APP_CTRL0_INT_RAW_R

Bit 7 - Indicates the raw interrupt of UHCI_APP_CTRL0_INT. Interrupt will be triggered when UHCI_APP_CTRL0_IN_SET is set to 1.

pub fn app_ctrl1_int_raw(&self) -> APP_CTRL1_INT_RAW_R

Bit 8 - Indicates the raw interrupt of UHCI_APP_CTRL1_INT. Interrupt will be triggered when UHCI_APP_CTRL1_IN_SET is set to 1.