pub struct SPI1 { /* private fields */ }
Expand description
SPI (Serial Peripheral Interface) Controller 1
Implementations§
source§impl SPI1
impl SPI1
sourcepub const PTR: *const RegisterBlock = {0x60003000 as *const spi1::RegisterBlock}
pub const PTR: *const RegisterBlock = {0x60003000 as *const spi1::RegisterBlock}
Pointer to the register block
sourcepub const fn ptr() -> *const RegisterBlock
pub const fn ptr() -> *const RegisterBlock
Return the pointer to the register block
sourcepub unsafe fn steal() -> Self
pub unsafe fn steal() -> Self
Steal an instance of this peripheral
Safety
Ensure that the new instance of the peripheral cannot be used in a way that may race with any existing instances, for example by only accessing read-only or write-only registers, or by consuming the original peripheral and using critical sections to coordinate access between multiple new instances.
Additionally, other software such as HALs may rely on only one peripheral instance existing to ensure memory safety; ensure no stolen instances are passed to such software.
Methods from Deref<Target = RegisterBlock>§
sourcepub fn spi_mem_cmd(&self) -> &SPI_MEM_CMD
pub fn spi_mem_cmd(&self) -> &SPI_MEM_CMD
0x00 - SPI1 memory command register
sourcepub fn spi_mem_addr(&self) -> &SPI_MEM_ADDR
pub fn spi_mem_addr(&self) -> &SPI_MEM_ADDR
0x04 - SPI1 address register
sourcepub fn spi_mem_ctrl(&self) -> &SPI_MEM_CTRL
pub fn spi_mem_ctrl(&self) -> &SPI_MEM_CTRL
0x08 - SPI1 control register.
sourcepub fn spi_mem_ctrl1(&self) -> &SPI_MEM_CTRL1
pub fn spi_mem_ctrl1(&self) -> &SPI_MEM_CTRL1
0x0c - SPI1 control1 register.
sourcepub fn spi_mem_ctrl2(&self) -> &SPI_MEM_CTRL2
pub fn spi_mem_ctrl2(&self) -> &SPI_MEM_CTRL2
0x10 - SPI1 control2 register.
sourcepub fn spi_mem_clock(&self) -> &SPI_MEM_CLOCK
pub fn spi_mem_clock(&self) -> &SPI_MEM_CLOCK
0x14 - SPI1 clock division control register.
sourcepub fn spi_mem_user(&self) -> &SPI_MEM_USER
pub fn spi_mem_user(&self) -> &SPI_MEM_USER
0x18 - SPI1 user register.
sourcepub fn spi_mem_user1(&self) -> &SPI_MEM_USER1
pub fn spi_mem_user1(&self) -> &SPI_MEM_USER1
0x1c - SPI1 user1 register.
sourcepub fn spi_mem_user2(&self) -> &SPI_MEM_USER2
pub fn spi_mem_user2(&self) -> &SPI_MEM_USER2
0x20 - SPI1 user2 register.
sourcepub fn spi_mem_mosi_dlen(&self) -> &SPI_MEM_MOSI_DLEN
pub fn spi_mem_mosi_dlen(&self) -> &SPI_MEM_MOSI_DLEN
0x24 - SPI1 send data bit length control register.
sourcepub fn spi_mem_miso_dlen(&self) -> &SPI_MEM_MISO_DLEN
pub fn spi_mem_miso_dlen(&self) -> &SPI_MEM_MISO_DLEN
0x28 - SPI1 receive data bit length control register.
sourcepub fn spi_mem_rd_status(&self) -> &SPI_MEM_RD_STATUS
pub fn spi_mem_rd_status(&self) -> &SPI_MEM_RD_STATUS
0x2c - SPI1 status register.
sourcepub fn spi_mem_misc(&self) -> &SPI_MEM_MISC
pub fn spi_mem_misc(&self) -> &SPI_MEM_MISC
0x34 - SPI1 misc register
sourcepub fn spi_mem_tx_crc(&self) -> &SPI_MEM_TX_CRC
pub fn spi_mem_tx_crc(&self) -> &SPI_MEM_TX_CRC
0x38 - SPI1 TX CRC data register.
sourcepub fn spi_mem_cache_fctrl(&self) -> &SPI_MEM_CACHE_FCTRL
pub fn spi_mem_cache_fctrl(&self) -> &SPI_MEM_CACHE_FCTRL
0x3c - SPI1 bit mode control register.
sourcepub fn spi_mem_w0(&self) -> &SPI_MEM_W0
pub fn spi_mem_w0(&self) -> &SPI_MEM_W0
0x58 - SPI1 memory data buffer0
sourcepub fn spi_mem_w1(&self) -> &SPI_MEM_W1
pub fn spi_mem_w1(&self) -> &SPI_MEM_W1
0x5c - SPI1 memory data buffer1
sourcepub fn spi_mem_w2(&self) -> &SPI_MEM_W2
pub fn spi_mem_w2(&self) -> &SPI_MEM_W2
0x60 - SPI1 memory data buffer2
sourcepub fn spi_mem_w3(&self) -> &SPI_MEM_W3
pub fn spi_mem_w3(&self) -> &SPI_MEM_W3
0x64 - SPI1 memory data buffer3
sourcepub fn spi_mem_w4(&self) -> &SPI_MEM_W4
pub fn spi_mem_w4(&self) -> &SPI_MEM_W4
0x68 - SPI1 memory data buffer4
sourcepub fn spi_mem_w5(&self) -> &SPI_MEM_W5
pub fn spi_mem_w5(&self) -> &SPI_MEM_W5
0x6c - SPI1 memory data buffer5
sourcepub fn spi_mem_w6(&self) -> &SPI_MEM_W6
pub fn spi_mem_w6(&self) -> &SPI_MEM_W6
0x70 - SPI1 memory data buffer6
sourcepub fn spi_mem_w7(&self) -> &SPI_MEM_W7
pub fn spi_mem_w7(&self) -> &SPI_MEM_W7
0x74 - SPI1 memory data buffer7
sourcepub fn spi_mem_w8(&self) -> &SPI_MEM_W8
pub fn spi_mem_w8(&self) -> &SPI_MEM_W8
0x78 - SPI1 memory data buffer8
sourcepub fn spi_mem_w9(&self) -> &SPI_MEM_W9
pub fn spi_mem_w9(&self) -> &SPI_MEM_W9
0x7c - SPI1 memory data buffer9
sourcepub fn spi_mem_w10(&self) -> &SPI_MEM_W10
pub fn spi_mem_w10(&self) -> &SPI_MEM_W10
0x80 - SPI1 memory data buffer10
sourcepub fn spi_mem_w11(&self) -> &SPI_MEM_W11
pub fn spi_mem_w11(&self) -> &SPI_MEM_W11
0x84 - SPI1 memory data buffer11
sourcepub fn spi_mem_w12(&self) -> &SPI_MEM_W12
pub fn spi_mem_w12(&self) -> &SPI_MEM_W12
0x88 - SPI1 memory data buffer12
sourcepub fn spi_mem_w13(&self) -> &SPI_MEM_W13
pub fn spi_mem_w13(&self) -> &SPI_MEM_W13
0x8c - SPI1 memory data buffer13
sourcepub fn spi_mem_w14(&self) -> &SPI_MEM_W14
pub fn spi_mem_w14(&self) -> &SPI_MEM_W14
0x90 - SPI1 memory data buffer14
sourcepub fn spi_mem_w15(&self) -> &SPI_MEM_W15
pub fn spi_mem_w15(&self) -> &SPI_MEM_W15
0x94 - SPI1 memory data buffer15
sourcepub fn spi_mem_flash_waiti_ctrl(&self) -> &SPI_MEM_FLASH_WAITI_CTRL
pub fn spi_mem_flash_waiti_ctrl(&self) -> &SPI_MEM_FLASH_WAITI_CTRL
0x98 - SPI1 wait idle control register
sourcepub fn spi_mem_flash_sus_ctrl(&self) -> &SPI_MEM_FLASH_SUS_CTRL
pub fn spi_mem_flash_sus_ctrl(&self) -> &SPI_MEM_FLASH_SUS_CTRL
0x9c - SPI1 flash suspend control register
sourcepub fn spi_mem_flash_sus_cmd(&self) -> &SPI_MEM_FLASH_SUS_CMD
pub fn spi_mem_flash_sus_cmd(&self) -> &SPI_MEM_FLASH_SUS_CMD
0xa0 - SPI1 flash suspend command register
sourcepub fn spi_mem_sus_status(&self) -> &SPI_MEM_SUS_STATUS
pub fn spi_mem_sus_status(&self) -> &SPI_MEM_SUS_STATUS
0xa4 - SPI1 flash suspend status register
sourcepub fn spi_mem_int_ena(&self) -> &SPI_MEM_INT_ENA
pub fn spi_mem_int_ena(&self) -> &SPI_MEM_INT_ENA
0xc0 - SPI1 interrupt enable register
sourcepub fn spi_mem_int_clr(&self) -> &SPI_MEM_INT_CLR
pub fn spi_mem_int_clr(&self) -> &SPI_MEM_INT_CLR
0xc4 - SPI1 interrupt clear register
sourcepub fn spi_mem_int_raw(&self) -> &SPI_MEM_INT_RAW
pub fn spi_mem_int_raw(&self) -> &SPI_MEM_INT_RAW
0xc8 - SPI1 interrupt raw register
sourcepub fn spi_mem_int_st(&self) -> &SPI_MEM_INT_ST
pub fn spi_mem_int_st(&self) -> &SPI_MEM_INT_ST
0xcc - SPI1 interrupt status register
sourcepub fn spi_mem_ddr(&self) -> &SPI_MEM_DDR
pub fn spi_mem_ddr(&self) -> &SPI_MEM_DDR
0xd4 - SPI1 DDR control register
sourcepub fn spi_mem_timing_cali(&self) -> &SPI_MEM_TIMING_CALI
pub fn spi_mem_timing_cali(&self) -> &SPI_MEM_TIMING_CALI
0x180 - SPI1 timing control register
sourcepub fn spi_mem_clock_gate(&self) -> &SPI_MEM_CLOCK_GATE
pub fn spi_mem_clock_gate(&self) -> &SPI_MEM_CLOCK_GATE
0x200 - SPI1 clk_gate register
sourcepub fn spi_mem_date(&self) -> &SPI_MEM_DATE
pub fn spi_mem_date(&self) -> &SPI_MEM_DATE
0x3fc - Version control register