Struct esp32c6::extmem::l1_cache_autoload_ctrl::L1_CACHE_AUTOLOAD_CTRL_SPEC

pub struct L1_CACHE_AUTOLOAD_CTRL_SPEC;

L1 Cache autoload-operation control register

You can read this register and get l1_cache_autoload_ctrl::R. You can reset, write, write_with_zero this register using l1_cache_autoload_ctrl::W. You can also modify this register. See API.

Trait Implementations

impl RegisterSpec for L1_CACHE_AUTOLOAD_CTRL_SPEC

type Ux = u32

Raw register type (u8, u16, u32, …).

impl Resettable for L1_CACHE_AUTOLOAD_CTRL_SPEC

reset() method sets L1_CACHE_AUTOLOAD_CTRL to value 0x02

const RESET_VALUE: Self::Ux = {transmute(0x00000002): <extmem::l1_cache_autoload_ctrl::L1_CACHE_AUTOLOAD_CTRL_SPEC as generic::RegisterSpec>::Ux}

Reset value of the register.

fn reset_value() -> Self::Ux

Reset value of the register.

impl Writable for L1_CACHE_AUTOLOAD_CTRL_SPEC

write(|w| ..) method takes l1_cache_autoload_ctrl::W writer structure

const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = {transmute(0x00000000): <extmem::l1_cache_autoload_ctrl::L1_CACHE_AUTOLOAD_CTRL_SPEC as generic::RegisterSpec>::Ux}

Specifies the register bits that are not changed if you pass 1 and are changed if you pass 0

const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = {transmute(0x00000000): <extmem::l1_cache_autoload_ctrl::L1_CACHE_AUTOLOAD_CTRL_SPEC as generic::RegisterSpec>::Ux}

Specifies the register bits that are not changed if you pass 0 and are changed if you pass 1

impl Readable for L1_CACHE_AUTOLOAD_CTRL_SPEC

read() method returns l1_cache_autoload_ctrl::R reader structure