1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81

#[doc = "Register `I2C_COMD2` reader"]
pub type R = crate::R<I2C_COMD2_SPEC>;
#[doc = "Register `I2C_COMD2` writer"]
pub type W = crate::W<I2C_COMD2_SPEC>;
#[doc = "Field `I2C_COMMAND2` reader - This is the content of command 2. It consists of three parts: op_code is the command, 0: RSTART, 1: WRITE, 2: READ, 3: STOP, 4: END. Byte_num represents the number of bytes that need to be sent or received. ack_check_en, ack_exp and ack are used to control the ACK bit. See I2C cmd structure for more Information."]
pub type I2C_COMMAND2_R = crate::FieldReader<u16>;
#[doc = "Field `I2C_COMMAND2` writer - This is the content of command 2. It consists of three parts: op_code is the command, 0: RSTART, 1: WRITE, 2: READ, 3: STOP, 4: END. Byte_num represents the number of bytes that need to be sent or received. ack_check_en, ack_exp and ack are used to control the ACK bit. See I2C cmd structure for more Information."]
pub type I2C_COMMAND2_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 14, O, u16>;
#[doc = "Field `I2C_COMMAND2_DONE` reader - When command 2 is done in I2C Master mode, this bit changes to high Level."]
pub type I2C_COMMAND2_DONE_R = crate::BitReader;
#[doc = "Field `I2C_COMMAND2_DONE` writer - When command 2 is done in I2C Master mode, this bit changes to high Level."]
pub type I2C_COMMAND2_DONE_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>;
impl R {
    #[doc = "Bits 0:13 - This is the content of command 2. It consists of three parts: op_code is the command, 0: RSTART, 1: WRITE, 2: READ, 3: STOP, 4: END. Byte_num represents the number of bytes that need to be sent or received. ack_check_en, ack_exp and ack are used to control the ACK bit. See I2C cmd structure for more Information."]
    #[inline(always)]
    pub fn i2c_command2(&self) -> I2C_COMMAND2_R {
        I2C_COMMAND2_R::new((self.bits & 0x3fff) as u16)
    }
    #[doc = "Bit 31 - When command 2 is done in I2C Master mode, this bit changes to high Level."]
    #[inline(always)]
    pub fn i2c_command2_done(&self) -> I2C_COMMAND2_DONE_R {
        I2C_COMMAND2_DONE_R::new(((self.bits >> 31) & 1) != 0)
    }
}
#[cfg(feature = "impl-register-debug")]
impl core::fmt::Debug for R {
    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
        f.debug_struct("I2C_COMD2")
            .field(
                "i2c_command2",
                &format_args!("{}", self.i2c_command2().bits()),
            )
            .field(
                "i2c_command2_done",
                &format_args!("{}", self.i2c_command2_done().bit()),
            )
            .finish()
    }
}
#[cfg(feature = "impl-register-debug")]
impl core::fmt::Debug for crate::generic::Reg<I2C_COMD2_SPEC> {
    fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
        self.read().fmt(f)
    }
}
impl W {
    #[doc = "Bits 0:13 - This is the content of command 2. It consists of three parts: op_code is the command, 0: RSTART, 1: WRITE, 2: READ, 3: STOP, 4: END. Byte_num represents the number of bytes that need to be sent or received. ack_check_en, ack_exp and ack are used to control the ACK bit. See I2C cmd structure for more Information."]
    #[inline(always)]
    #[must_use]
    pub fn i2c_command2(&mut self) -> I2C_COMMAND2_W<I2C_COMD2_SPEC, 0> {
        I2C_COMMAND2_W::new(self)
    }
    #[doc = "Bit 31 - When command 2 is done in I2C Master mode, this bit changes to high Level."]
    #[inline(always)]
    #[must_use]
    pub fn i2c_command2_done(&mut self) -> I2C_COMMAND2_DONE_W<I2C_COMD2_SPEC, 31> {
        I2C_COMMAND2_DONE_W::new(self)
    }
    #[doc = "Writes raw bits to the register."]
    #[inline(always)]
    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
        self.bits = bits;
        self
    }
}
#[doc = "I2C command register 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`i2c_comd2::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`i2c_comd2::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
pub struct I2C_COMD2_SPEC;
impl crate::RegisterSpec for I2C_COMD2_SPEC {
    type Ux = u32;
}
#[doc = "`read()` method returns [`i2c_comd2::R`](R) reader structure"]
impl crate::Readable for I2C_COMD2_SPEC {}
#[doc = "`write(|w| ..)` method takes [`i2c_comd2::W`](W) writer structure"]
impl crate::Writable for I2C_COMD2_SPEC {
    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
}
#[doc = "`reset()` method sets I2C_COMD2 to value 0"]
impl crate::Resettable for I2C_COMD2_SPEC {
    const RESET_VALUE: Self::Ux = 0;
}