Struct esp32c6::mcpwm0::RegisterBlock

source ·

#[repr(C)]
pub struct RegisterBlock {Show 76 fields
    pub clk_cfg: CLK_CFG,
    pub timer0_cfg0: TIMER0_CFG0,
    pub timer0_cfg1: TIMER0_CFG1,
    pub timer0_sync: TIMER0_SYNC,
    pub timer0_status: TIMER0_STATUS,
    pub timer1_cfg0: TIMER1_CFG0,
    pub timer1_cfg1: TIMER1_CFG1,
    pub timer1_sync: TIMER1_SYNC,
    pub timer1_status: TIMER1_STATUS,
    pub timer2_cfg0: TIMER2_CFG0,
    pub timer2_cfg1: TIMER2_CFG1,
    pub timer2_sync: TIMER2_SYNC,
    pub timer2_status: TIMER2_STATUS,
    pub timer_synci_cfg: TIMER_SYNCI_CFG,
    pub operator_timersel: OPERATOR_TIMERSEL,
    pub gen0_stmp_cfg: GEN0_STMP_CFG,
    pub gen0_tstmp_a: GEN0_TSTMP_A,
    pub gen0_tstmp_b: GEN0_TSTMP_B,
    pub gen0_cfg0: GEN0_CFG0,
    pub gen0_force: GEN0_FORCE,
    pub gen0_a: GEN0_A,
    pub gen0_b: GEN0_B,
    pub dt0_cfg: DT0_CFG,
    pub dt0_fed_cfg: DT0_FED_CFG,
    pub dt0_red_cfg: DT0_RED_CFG,
    pub carrier0_cfg: CARRIER0_CFG,
    pub fh0_cfg0: FH0_CFG0,
    pub fh0_cfg1: FH0_CFG1,
    pub fh0_status: FH0_STATUS,
    pub gen1_stmp_cfg: GEN1_STMP_CFG,
    pub gen1_tstmp_a: GEN1_TSTMP_A,
    pub gen1_tstmp_b: GEN1_TSTMP_B,
    pub gen1_cfg0: GEN1_CFG0,
    pub gen1_force: GEN1_FORCE,
    pub gen1_a: GEN1_A,
    pub gen1_b: GEN1_B,
    pub dt1_cfg: DT1_CFG,
    pub dt1_fed_cfg: DT1_FED_CFG,
    pub dt1_red_cfg: DT1_RED_CFG,
    pub carrier1_cfg: CARRIER1_CFG,
    pub fh1_cfg0: FH1_CFG0,
    pub fh1_cfg1: FH1_CFG1,
    pub fh1_status: FH1_STATUS,
    pub gen2_stmp_cfg: GEN2_STMP_CFG,
    pub gen2_tstmp_a: GEN2_TSTMP_A,
    pub gen2_tstmp_b: GEN2_TSTMP_B,
    pub gen2_cfg0: GEN2_CFG0,
    pub gen2_force: GEN2_FORCE,
    pub gen2_a: GEN2_A,
    pub gen2_b: GEN2_B,
    pub dt2_cfg: DT2_CFG,
    pub dt2_fed_cfg: DT2_FED_CFG,
    pub dt2_red_cfg: DT2_RED_CFG,
    pub carrier2_cfg: CARRIER2_CFG,
    pub fh2_cfg0: FH2_CFG0,
    pub fh2_cfg1: FH2_CFG1,
    pub fh2_status: FH2_STATUS,
    pub fault_detect: FAULT_DETECT,
    pub cap_timer_cfg: CAP_TIMER_CFG,
    pub cap_timer_phase: CAP_TIMER_PHASE,
    pub cap_ch0_cfg: CAP_CH0_CFG,
    pub cap_ch1_cfg: CAP_CH1_CFG,
    pub cap_ch2_cfg: CAP_CH2_CFG,
    pub cap_ch0: CAP_CH0,
    pub cap_ch1: CAP_CH1,
    pub cap_ch2: CAP_CH2,
    pub cap_status: CAP_STATUS,
    pub update_cfg: UPDATE_CFG,
    pub int_ena: INT_ENA,
    pub int_raw: INT_RAW,
    pub int_st: INT_ST,
    pub int_clr: INT_CLR,
    pub evt_en: EVT_EN,
    pub task_en: TASK_EN,
    pub clk: CLK,
    pub version: VERSION,
}

Expand description

Register block

Fields§

§clk_cfg: CLK_CFG

0x00 - PWM clock prescaler register.

§timer0_cfg0: TIMER0_CFG0

0x04 - PWM timer0 period and update method configuration register.

§timer0_cfg1: TIMER0_CFG1

0x08 - PWM timer0 working mode and start/stop control configuration register.

§timer0_sync: TIMER0_SYNC

0x0c - PWM timer0 sync function configuration register.

§timer0_status: TIMER0_STATUS

0x10 - PWM timer0 status register.

§timer1_cfg0: TIMER1_CFG0

0x14 - PWM timer1 period and update method configuration register.

§timer1_cfg1: TIMER1_CFG1

0x18 - PWM timer1 working mode and start/stop control configuration register.

§timer1_sync: TIMER1_SYNC

0x1c - PWM timer1 sync function configuration register.

§timer1_status: TIMER1_STATUS

0x20 - PWM timer1 status register.

§timer2_cfg0: TIMER2_CFG0

0x24 - PWM timer2 period and update method configuration register.

§timer2_cfg1: TIMER2_CFG1

0x28 - PWM timer2 working mode and start/stop control configuration register.

§timer2_sync: TIMER2_SYNC

0x2c - PWM timer2 sync function configuration register.

§timer2_status: TIMER2_STATUS

0x30 - PWM timer2 status register.

§timer_synci_cfg: TIMER_SYNCI_CFG

0x34 - Synchronization input selection for three PWM timers.

§operator_timersel: OPERATOR_TIMERSEL

0x38 - Select specific timer for PWM operators.

§gen0_stmp_cfg: GEN0_STMP_CFG

0x3c - Transfer status and update method for time stamp registers A and B

§gen0_tstmp_a: GEN0_TSTMP_A

0x40 - Shadow register for register A.

§gen0_tstmp_b: GEN0_TSTMP_B

0x44 - Shadow register for register B.

§gen0_cfg0: GEN0_CFG0

0x48 - Fault event T0 and T1 handling

§gen0_force: GEN0_FORCE

0x4c - Permissives to force PWM0A and PWM0B outputs by software

§gen0_a: GEN0_A

0x50 - Actions triggered by events on PWM0A

§gen0_b: GEN0_B

0x54 - Actions triggered by events on PWM0B

§dt0_cfg: DT0_CFG

0x58 - dead time type selection and configuration

§dt0_fed_cfg: DT0_FED_CFG

0x5c - Shadow register for falling edge delay (FED).

§dt0_red_cfg: DT0_RED_CFG

0x60 - Shadow register for rising edge delay (RED).

§carrier0_cfg: CARRIER0_CFG

0x64 - Carrier enable and configuratoin

§fh0_cfg0: FH0_CFG0

0x68 - Actions on PWM0A and PWM0B trip events

§fh0_cfg1: FH0_CFG1

0x6c - Software triggers for fault handler actions

§fh0_status: FH0_STATUS

0x70 - Status of fault events.

§gen1_stmp_cfg: GEN1_STMP_CFG

0x74 - Transfer status and update method for time stamp registers A and B

§gen1_tstmp_a: GEN1_TSTMP_A

0x78 - Shadow register for register A.

§gen1_tstmp_b: GEN1_TSTMP_B

0x7c - Shadow register for register B.

§gen1_cfg0: GEN1_CFG0

0x80 - Fault event T0 and T1 handling

§gen1_force: GEN1_FORCE

0x84 - Permissives to force PWM1A and PWM1B outputs by software

§gen1_a: GEN1_A

0x88 - Actions triggered by events on PWM1A

§gen1_b: GEN1_B

0x8c - Actions triggered by events on PWM1B

§dt1_cfg: DT1_CFG

0x90 - dead time type selection and configuration

§dt1_fed_cfg: DT1_FED_CFG

0x94 - Shadow register for falling edge delay (FED).

§dt1_red_cfg: DT1_RED_CFG

0x98 - Shadow register for rising edge delay (RED).

§carrier1_cfg: CARRIER1_CFG

0x9c - Carrier enable and configuratoin

§fh1_cfg0: FH1_CFG0

0xa0 - Actions on PWM1A and PWM1B trip events

§fh1_cfg1: FH1_CFG1

0xa4 - Software triggers for fault handler actions

§fh1_status: FH1_STATUS

0xa8 - Status of fault events.

§gen2_stmp_cfg: GEN2_STMP_CFG

0xac - Transfer status and update method for time stamp registers A and B

§gen2_tstmp_a: GEN2_TSTMP_A

0xb0 - Shadow register for register A.

§gen2_tstmp_b: GEN2_TSTMP_B

0xb4 - Shadow register for register B.

§gen2_cfg0: GEN2_CFG0

0xb8 - Fault event T0 and T1 handling

§gen2_force: GEN2_FORCE

0xbc - Permissives to force PWM2A and PWM2B outputs by software

§gen2_a: GEN2_A

0xc0 - Actions triggered by events on PWM2A

§gen2_b: GEN2_B

0xc4 - Actions triggered by events on PWM2B

§dt2_cfg: DT2_CFG

0xc8 - dead time type selection and configuration

§dt2_fed_cfg: DT2_FED_CFG

0xcc - Shadow register for falling edge delay (FED).

§dt2_red_cfg: DT2_RED_CFG

0xd0 - Shadow register for rising edge delay (RED).

§carrier2_cfg: CARRIER2_CFG

0xd4 - Carrier enable and configuratoin

§fh2_cfg0: FH2_CFG0

0xd8 - Actions on PWM2A and PWM2B trip events

§fh2_cfg1: FH2_CFG1

0xdc - Software triggers for fault handler actions

§fh2_status: FH2_STATUS

0xe0 - Status of fault events.

§fault_detect: FAULT_DETECT

0xe4 - Fault detection configuration and status

§cap_timer_cfg: CAP_TIMER_CFG

0xe8 - Configure capture timer

§cap_timer_phase: CAP_TIMER_PHASE

0xec - Phase for capture timer sync

§cap_ch0_cfg: CAP_CH0_CFG

0xf0 - Capture channel 0 configuration and enable

§cap_ch1_cfg: CAP_CH1_CFG

0xf4 - Capture channel 1 configuration and enable

§cap_ch2_cfg: CAP_CH2_CFG

0xf8 - Capture channel 2 configuration and enable

§cap_ch0: CAP_CH0

0xfc - ch0 capture value status register

§cap_ch1: CAP_CH1

0x100 - ch1 capture value status register

§cap_ch2: CAP_CH2

0x104 - ch2 capture value status register

§cap_status: CAP_STATUS

0x108 - Edge of last capture trigger

§update_cfg: UPDATE_CFG

0x10c - Enable update.

§int_ena: INT_ENA

0x110 - Interrupt enable bits

§int_raw: INT_RAW

0x114 - Raw interrupt status

§int_st: INT_ST

0x118 - Masked interrupt status

§int_clr: INT_CLR

0x11c - Interrupt clear bits

§evt_en: EVT_EN

0x120 - MCPWM event enable register

§task_en: TASK_EN

0x124 - MCPWM task enable register

§clk: CLK

0x128 - MCPWM APB configuration register

§version: VERSION

0x12c - Version register.

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impl UnwindSafe for RegisterBlock

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Struct esp32c6::mcpwm0::RegisterBlock

Fields§

Auto Trait Implementations§

impl !RefUnwindSafe for RegisterBlock

impl Send for RegisterBlock

impl !Sync for RegisterBlock

impl Unpin for RegisterBlock

impl UnwindSafe for RegisterBlock

Blanket Implementations§

impl<T> Any for Twhere T: 'static + ?Sized,

fn type_id(&self) -> TypeId

impl<T> Borrow<T> for Twhere T: ?Sized,

fn borrow(&self) -> &T

impl<T> BorrowMut<T> for Twhere T: ?Sized,

fn borrow_mut(&mut self) -> &mut T

impl<T> From<T> for T

fn from(t: T) -> T

impl<T, U> Into<U> for Twhere U: From<T>,

fn into(self) -> U

impl<T, U> TryFrom<U> for Twhere U: Into<T>,

type Error = Infallible

fn try_from(value: U) -> Result<T, <T as TryFrom<U>>::Error>

impl<T, U> TryInto<U> for Twhere U: TryFrom<T>,

type Error = <U as TryFrom<T>>::Error

fn try_into(self) -> Result<U, <U as TryFrom<T>>::Error>