Module esp32c6::spi1::spi_mem_cache_fctrl
source · Expand description
SPI1 bit mode control register.
Structs
- Register
SPI_MEM_CACHE_FCTRL
reader - SPI1 bit mode control register.
- Register
SPI_MEM_CACHE_FCTRL
writer
Type Definitions
- Field
SPI_MEM_CACHE_USR_ADDR_4BYTE
reader - For SPI1, cache read flash with 4 bytes address, 1: enable, 0:disable. - Field
SPI_MEM_CACHE_USR_ADDR_4BYTE
writer - For SPI1, cache read flash with 4 bytes address, 1: enable, 0:disable. - Field
SPI_MEM_FADDR_DUAL
reader - For SPI1, address phase apply 2 signals. 1: enable 0: disable. The bit is the same with spi_mem_fread_dio. - Field
SPI_MEM_FADDR_DUAL
writer - For SPI1, address phase apply 2 signals. 1: enable 0: disable. The bit is the same with spi_mem_fread_dio. - Field
SPI_MEM_FADDR_QUAD
reader - For SPI1, address phase apply 4 signals. 1: enable 0: disable. The bit is the same with spi_mem_fread_qio. - Field
SPI_MEM_FADDR_QUAD
writer - For SPI1, address phase apply 4 signals. 1: enable 0: disable. The bit is the same with spi_mem_fread_qio. - Field
SPI_MEM_FDIN_DUAL
reader - For SPI1, din phase apply 2 signals. 1: enable 0: disable. The bit is the same with spi_mem_fread_dio. - Field
SPI_MEM_FDIN_DUAL
writer - For SPI1, din phase apply 2 signals. 1: enable 0: disable. The bit is the same with spi_mem_fread_dio. - Field
SPI_MEM_FDIN_QUAD
reader - For SPI1, din phase apply 4 signals. 1: enable 0: disable. The bit is the same with spi_mem_fread_qio. - Field
SPI_MEM_FDIN_QUAD
writer - For SPI1, din phase apply 4 signals. 1: enable 0: disable. The bit is the same with spi_mem_fread_qio. - Field
SPI_MEM_FDOUT_DUAL
reader - For SPI1, dout phase apply 2 signals. 1: enable 0: disable. The bit is the same with spi_mem_fread_dio. - Field
SPI_MEM_FDOUT_DUAL
writer - For SPI1, dout phase apply 2 signals. 1: enable 0: disable. The bit is the same with spi_mem_fread_dio. - Field
SPI_MEM_FDOUT_QUAD
reader - For SPI1, dout phase apply 4 signals. 1: enable 0: disable. The bit is the same with spi_mem_fread_qio. - Field
SPI_MEM_FDOUT_QUAD
writer - For SPI1, dout phase apply 4 signals. 1: enable 0: disable. The bit is the same with spi_mem_fread_qio.