Module esp32c6::extmem::l2_cache_access_attr_ctrl
source · Expand description
L1 Cache access Attribute propagation control register
Structs
- L1 Cache access Attribute propagation control register
- Register
L2_CACHE_ACCESS_ATTR_CTRLreader
Type Definitions
- Field
L2_CACHE_ACCESS_FORCE_CCreader - Set this bit to force the request to l2 cache with cacheable attribute, otherwise, the attribute is propagated from L1 cache or CPU, it could be one of cacheable and non-cacheable. - Field
L2_CACHE_ACCESS_FORCE_RMAreader - Set this bit to force the request to l2 cache with read-miss-allocate attribute, otherwise, the attribute is propagated from L1 cache or CPU, it could be one of read-miss-allocate and read-miss-no-allocate. - Field
L2_CACHE_ACCESS_FORCE_WBreader - Set this bit to force the request to l2 cache with write-back attribute, otherwise, the attribute is propagated from L1 cache or CPU, it could be one of write-back and write-through. - Field
L2_CACHE_ACCESS_FORCE_WMAreader - Set this bit to force the request to l2 cache with write-miss-allocate attribute, otherwise, the attribute is propagated from L1 cache or CPU, it could be one of write-miss-allocate and write-miss-no-allocate.