Struct esp32c6::extmem::cache_sync_ctrl::W
source · pub struct W(_);
Expand description
Register CACHE_SYNC_CTRL
writer
Implementations§
source§impl W
impl W
sourcepub fn cache_invalidate_ena(&mut self) -> CACHE_INVALIDATE_ENA_W<'_, 0>
pub fn cache_invalidate_ena(&mut self) -> CACHE_INVALIDATE_ENA_W<'_, 0>
Bit 0 - The bit is used to enable invalidate operation. It will be cleared by hardware after invalidate operation done. Note that this bit and the other sync-bits (clean_ena, writeback_ena, writeback_invalidate_ena) are mutually exclusive, that is, those bits can not be set to 1 at the same time.
sourcepub fn cache_clean_ena(&mut self) -> CACHE_CLEAN_ENA_W<'_, 1>
pub fn cache_clean_ena(&mut self) -> CACHE_CLEAN_ENA_W<'_, 1>
Bit 1 - The bit is used to enable clean operation. It will be cleared by hardware after clean operation done. Note that this bit and the other sync-bits (invalidate_ena, writeback_ena, writeback_invalidate_ena) are mutually exclusive, that is, those bits can not be set to 1 at the same time.
sourcepub fn cache_writeback_ena(&mut self) -> CACHE_WRITEBACK_ENA_W<'_, 2>
pub fn cache_writeback_ena(&mut self) -> CACHE_WRITEBACK_ENA_W<'_, 2>
Bit 2 - The bit is used to enable writeback operation. It will be cleared by hardware after writeback operation done. Note that this bit and the other sync-bits (invalidate_ena, clean_ena, writeback_invalidate_ena) are mutually exclusive, that is, those bits can not be set to 1 at the same time.
sourcepub fn cache_writeback_invalidate_ena(
&mut self
) -> CACHE_WRITEBACK_INVALIDATE_ENA_W<'_, 3>
pub fn cache_writeback_invalidate_ena( &mut self ) -> CACHE_WRITEBACK_INVALIDATE_ENA_W<'_, 3>
Bit 3 - The bit is used to enable writeback-invalidate operation. It will be cleared by hardware after writeback-invalidate operation done. Note that this bit and the other sync-bits (invalidate_ena, clean_ena, writeback_ena) are mutually exclusive, that is, those bits can not be set to 1 at the same time.