Module esp32c6::pcr::ahb_freq_conf

AHB_FREQ configuration register

Structs

• AHB_FREQ_CONF_SPEC
  AHB_FREQ configuration register
• R
  Register AHB_FREQ_CONF reader
• W
  Register AHB_FREQ_CONF writer

Type Definitions

• AHB_HS_DIV_NUM_R
  Field AHB_HS_DIV_NUM reader - Set as one within (3,7,15) to generate clk_ahb drived by clk_hproot. The clk_ahb is div4(default)/div8/div16 of clk_hproot. This field is only avaliable for high-speed clock-source such as SPLL, and should be used together with PCR_CPU_HS_DIV_NUM.
• AHB_HS_DIV_NUM_W
  Field AHB_HS_DIV_NUM writer - Set as one within (3,7,15) to generate clk_ahb drived by clk_hproot. The clk_ahb is div4(default)/div8/div16 of clk_hproot. This field is only avaliable for high-speed clock-source such as SPLL, and should be used together with PCR_CPU_HS_DIV_NUM.
• AHB_LS_DIV_NUM_R
  Field AHB_LS_DIV_NUM reader - Set as one within (0,1,3,7) to generate clk_ahb drived by clk_hproot. The clk_ahb is div1(default)/div2/div4/div8 of clk_hproot. This field is only avaliable for low-speed clock-source such as XTAL/FOSC, and should be used together with PCR_CPU_LS_DIV_NUM.
• AHB_LS_DIV_NUM_W
  Field AHB_LS_DIV_NUM writer - Set as one within (0,1,3,7) to generate clk_ahb drived by clk_hproot. The clk_ahb is div1(default)/div2/div4/div8 of clk_hproot. This field is only avaliable for low-speed clock-source such as XTAL/FOSC, and should be used together with PCR_CPU_LS_DIV_NUM.