Struct esp32c6::pcr::pll_div_clk_en::W

pub struct W(_);

Register PLL_DIV_CLK_EN writer

Implementations

impl W

pub fn pll_240m_clk_en(&mut self) -> PLL_240M_CLK_EN_W<'_, 0>

Bit 0 - This field is used to open 240 MHz clock (div2 of SPLL) drived from SPLL. 0: close, 1: open(default). Only avaliable when high-speed clock-source SPLL is active.

pub fn pll_160m_clk_en(&mut self) -> PLL_160M_CLK_EN_W<'_, 1>

Bit 1 - This field is used to open 160 MHz clock (div3 of SPLL) drived from SPLL. 0: close, 1: open(default). Only avaliable when high-speed clock-source SPLL is active.

pub fn pll_120m_clk_en(&mut self) -> PLL_120M_CLK_EN_W<'_, 2>

Bit 2 - This field is used to open 120 MHz clock (div4 of SPLL) drived from SPLL. 0: close, 1: open(default). Only avaliable when high-speed clock-source SPLL is active.

pub fn pll_80m_clk_en(&mut self) -> PLL_80M_CLK_EN_W<'_, 3>

Bit 3 - This field is used to open 80 MHz clock (div6 of SPLL) drived from SPLL. 0: close, 1: open(default). Only avaliable when high-speed clock-source SPLL is active.

pub fn pll_48m_clk_en(&mut self) -> PLL_48M_CLK_EN_W<'_, 4>

Bit 4 - This field is used to open 48 MHz clock (div10 of SPLL) drived from SPLL. 0: close, 1: open(default). Only avaliable when high-speed clock-source SPLL is active.

pub fn pll_40m_clk_en(&mut self) -> PLL_40M_CLK_EN_W<'_, 5>

Bit 5 - This field is used to open 40 MHz clock (div12 of SPLL) drived from SPLL. 0: close, 1: open(default). Only avaliable when high-speed clock-source SPLL is active.

pub fn pll_20m_clk_en(&mut self) -> PLL_20M_CLK_EN_W<'_, 6>

Bit 6 - This field is used to open 20 MHz clock (div24 of SPLL) drived from SPLL. 0: close, 1: open(default). Only avaliable when high-speed clock-source SPLL is active.

pub unsafe fn bits(&mut self, bits: u32) -> &mut Self

Writes raw bits to the register.

Methods from Deref<Target = W<PLL_DIV_CLK_EN_SPEC>>

pub unsafe fn bits(&mut self, bits: REG::Ux) -> &mut Self

Writes raw bits to the register.

Safety

Read datasheet or reference manual to find what values are allowed to pass.

Trait Implementations

impl Deref for W

type Target = W<PLL_DIV_CLK_EN_SPEC>

The resulting type after dereferencing.

fn deref(&self) -> &Self::Target

Dereferences the value.

impl DerefMut for W

fn deref_mut(&mut self) -> &mut Self::Target

Mutably dereferences the value.

impl From<W<PLL_DIV_CLK_EN_SPEC>> for W

fn from(writer: W<PLL_DIV_CLK_EN_SPEC>) -> Self

Converts to this type from the input type.