Struct esp32c6::i2c0::fifo_conf::R

pub struct R(_);

Register FIFO_CONF reader

Implementations

impl R

pub fn rxfifo_wm_thrhd(&self) -> RXFIFO_WM_THRHD_R

Bits 0:4 - The water mark threshold of rx FIFO in nonfifo access mode. When reg_reg_fifo_prt_en is 1 and rx FIFO counter is bigger than reg_rxfifo_wm_thrhd[4:0], reg_rxfifo_wm_int_raw bit will be valid.

pub fn txfifo_wm_thrhd(&self) -> TXFIFO_WM_THRHD_R

Bits 5:9 - The water mark threshold of tx FIFO in nonfifo access mode. When reg_reg_fifo_prt_en is 1 and tx FIFO counter is smaller than reg_txfifo_wm_thrhd[4:0], reg_txfifo_wm_int_raw bit will be valid.

pub fn nonfifo_en(&self) -> NONFIFO_EN_R

Bit 10 - Set this bit to enable APB nonfifo access.

pub fn fifo_addr_cfg_en(&self) -> FIFO_ADDR_CFG_EN_R

Bit 11 - When this bit is set to 1, the byte received after the I2C address byte represents the offset address in the I2C Slave RAM.

pub fn rx_fifo_rst(&self) -> RX_FIFO_RST_R

Bit 12 - Set this bit to reset rx-fifo.

pub fn tx_fifo_rst(&self) -> TX_FIFO_RST_R

Bit 13 - Set this bit to reset tx-fifo.

pub fn fifo_prt_en(&self) -> FIFO_PRT_EN_R

Bit 14 - The control enable bit of FIFO pointer in non-fifo access mode. This bit controls the valid bits and the interrupts of tx/rx_fifo overflow, underflow, full and empty.

Methods from Deref<Target = R<FIFO_CONF_SPEC>>

pub fn bits(&self) -> REG::Ux

Reads raw bits from register.

Trait Implementations

impl Deref for R

type Target = R<FIFO_CONF_SPEC>

The resulting type after dereferencing.

fn deref(&self) -> &Self::Target

Dereferences the value.

impl From<R<FIFO_CONF_SPEC>> for R

fn from(reader: R<FIFO_CONF_SPEC>) -> Self

Converts to this type from the input type.