Struct esp32c6::extmem::l1_icache_ctrl::R

pub struct R(_);

Register L1_ICACHE_CTRL reader

Implementations

impl R

pub fn l1_icache_shut_ibus0(&self) -> L1_ICACHE_SHUT_IBUS0_R

Bit 0 - The bit is used to disable core0 ibus access L1-ICache, 0: enable, 1: disable

pub fn l1_icache_shut_ibus1(&self) -> L1_ICACHE_SHUT_IBUS1_R

Bit 1 - The bit is used to disable core1 ibus access L1-ICache, 0: enable, 1: disable

pub fn l1_icache_shut_ibus2(&self) -> L1_ICACHE_SHUT_IBUS2_R

Bit 2 - Reserved

pub fn l1_icache_shut_ibus3(&self) -> L1_ICACHE_SHUT_IBUS3_R

Bit 3 - Reserved

pub fn l1_icache_undef_op(&self) -> L1_ICACHE_UNDEF_OP_R

Bits 4:7 - Reserved

Methods from Deref<Target = R<L1_ICACHE_CTRL_SPEC>>

pub fn bits(&self) -> REG::Ux

Reads raw bits from register.

Trait Implementations

impl Deref for R

type Target = R<L1_ICACHE_CTRL_SPEC>

The resulting type after dereferencing.

fn deref(&self) -> &Self::Target

Dereferences the value.

impl From<R<L1_ICACHE_CTRL_SPEC>> for R

fn from(reader: R<L1_ICACHE_CTRL_SPEC>) -> Self

Converts to this type from the input type.