pub type W = W<CONF1_SPEC>;
Expand description
Register CONF1
writer
Aliased Type§
pub struct W { /* private fields */ }
Implementations§
Source§impl W
impl W
Sourcepub fn rxfifo_full_thrhd(&mut self) -> RXFIFO_FULL_THRHD_W<'_, CONF1_SPEC>
pub fn rxfifo_full_thrhd(&mut self) -> RXFIFO_FULL_THRHD_W<'_, CONF1_SPEC>
Bits 3:7 - It will produce rxfifo_full_int interrupt when receiver receives more data than this register value.
Sourcepub fn txfifo_empty_thrhd(&mut self) -> TXFIFO_EMPTY_THRHD_W<'_, CONF1_SPEC>
pub fn txfifo_empty_thrhd(&mut self) -> TXFIFO_EMPTY_THRHD_W<'_, CONF1_SPEC>
Bits 11:15 - It will produce txfifo_empty_int interrupt when the data amount in Tx-FIFO is less than this register value.
Sourcepub fn cts_inv(&mut self) -> CTS_INV_W<'_, CONF1_SPEC>
pub fn cts_inv(&mut self) -> CTS_INV_W<'_, CONF1_SPEC>
Bit 16 - Set this bit to inverse the level value of uart cts signal.
Sourcepub fn dsr_inv(&mut self) -> DSR_INV_W<'_, CONF1_SPEC>
pub fn dsr_inv(&mut self) -> DSR_INV_W<'_, CONF1_SPEC>
Bit 17 - Set this bit to inverse the level value of uart dsr signal.
Sourcepub fn rts_inv(&mut self) -> RTS_INV_W<'_, CONF1_SPEC>
pub fn rts_inv(&mut self) -> RTS_INV_W<'_, CONF1_SPEC>
Bit 18 - Set this bit to inverse the level value of uart rts signal.
Sourcepub fn dtr_inv(&mut self) -> DTR_INV_W<'_, CONF1_SPEC>
pub fn dtr_inv(&mut self) -> DTR_INV_W<'_, CONF1_SPEC>
Bit 19 - Set this bit to inverse the level value of uart dtr signal.
Sourcepub fn sw_dtr(&mut self) -> SW_DTR_W<'_, CONF1_SPEC>
pub fn sw_dtr(&mut self) -> SW_DTR_W<'_, CONF1_SPEC>
Bit 20 - This register is used to configure the software dtr signal which is used in software flow control.
Sourcepub fn clk_en(&mut self) -> CLK_EN_W<'_, CONF1_SPEC>
pub fn clk_en(&mut self) -> CLK_EN_W<'_, CONF1_SPEC>
Bit 21 - 1’h1: Force clock on for register. 1’h0: Support clock only when application writes registers.