esp32c6/gpio_sd/
etm_task_p7_cfg.rs

1#[doc = "Register `ETM_TASK_P7_CFG` reader"]
2pub type R = crate::R<ETM_TASK_P7_CFG_SPEC>;
3#[doc = "Register `ETM_TASK_P7_CFG` writer"]
4pub type W = crate::W<ETM_TASK_P7_CFG_SPEC>;
5#[doc = "Field `GPIO_EN(28-30)` reader - Enable bit of GPIO response etm task."]
6pub type GPIO_EN_R = crate::BitReader;
7#[doc = "Field `GPIO_EN(28-30)` writer - Enable bit of GPIO response etm task."]
8pub type GPIO_EN_W<'a, REG> = crate::BitWriter<'a, REG>;
9#[doc = "Field `GPIO_SEL(28-30)` reader - GPIO choose a etm task channel."]
10pub type GPIO_SEL_R = crate::FieldReader;
11#[doc = "Field `GPIO_SEL(28-30)` writer - GPIO choose a etm task channel."]
12pub type GPIO_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 3>;
13impl R {
14    #[doc = "Enable bit of GPIO response etm task."]
15    #[doc = ""]
16    #[doc = "<div class=\"warning\">`n` is number of field in register. `n == 0` corresponds to `GPIO28_EN` field.</div>"]
17    #[inline(always)]
18    pub fn gpio_en(&self, n: u8) -> GPIO_EN_R {
19        #[allow(clippy::no_effect)]
20        [(); 3][n as usize];
21        GPIO_EN_R::new(((self.bits >> (n * 8)) & 1) != 0)
22    }
23    #[doc = "Iterator for array of:"]
24    #[doc = "Enable bit of GPIO response etm task."]
25    #[inline(always)]
26    pub fn gpio_en_iter(&self) -> impl Iterator<Item = GPIO_EN_R> + '_ {
27        (0..3).map(move |n| GPIO_EN_R::new(((self.bits >> (n * 8)) & 1) != 0))
28    }
29    #[doc = "Bit 0 - Enable bit of GPIO response etm task."]
30    #[inline(always)]
31    pub fn gpio28_en(&self) -> GPIO_EN_R {
32        GPIO_EN_R::new((self.bits & 1) != 0)
33    }
34    #[doc = "Bit 8 - Enable bit of GPIO response etm task."]
35    #[inline(always)]
36    pub fn gpio29_en(&self) -> GPIO_EN_R {
37        GPIO_EN_R::new(((self.bits >> 8) & 1) != 0)
38    }
39    #[doc = "Bit 16 - Enable bit of GPIO response etm task."]
40    #[inline(always)]
41    pub fn gpio30_en(&self) -> GPIO_EN_R {
42        GPIO_EN_R::new(((self.bits >> 16) & 1) != 0)
43    }
44    #[doc = "GPIO choose a etm task channel."]
45    #[doc = ""]
46    #[doc = "<div class=\"warning\">`n` is number of field in register. `n == 0` corresponds to `GPIO28_SEL` field.</div>"]
47    #[inline(always)]
48    pub fn gpio_sel(&self, n: u8) -> GPIO_SEL_R {
49        #[allow(clippy::no_effect)]
50        [(); 3][n as usize];
51        GPIO_SEL_R::new(((self.bits >> (n * 8 + 1)) & 7) as u8)
52    }
53    #[doc = "Iterator for array of:"]
54    #[doc = "GPIO choose a etm task channel."]
55    #[inline(always)]
56    pub fn gpio_sel_iter(&self) -> impl Iterator<Item = GPIO_SEL_R> + '_ {
57        (0..3).map(move |n| GPIO_SEL_R::new(((self.bits >> (n * 8 + 1)) & 7) as u8))
58    }
59    #[doc = "Bits 1:3 - GPIO choose a etm task channel."]
60    #[inline(always)]
61    pub fn gpio28_sel(&self) -> GPIO_SEL_R {
62        GPIO_SEL_R::new(((self.bits >> 1) & 7) as u8)
63    }
64    #[doc = "Bits 9:11 - GPIO choose a etm task channel."]
65    #[inline(always)]
66    pub fn gpio29_sel(&self) -> GPIO_SEL_R {
67        GPIO_SEL_R::new(((self.bits >> 9) & 7) as u8)
68    }
69    #[doc = "Bits 17:19 - GPIO choose a etm task channel."]
70    #[inline(always)]
71    pub fn gpio30_sel(&self) -> GPIO_SEL_R {
72        GPIO_SEL_R::new(((self.bits >> 17) & 7) as u8)
73    }
74}
75#[cfg(feature = "impl-register-debug")]
76impl core::fmt::Debug for R {
77    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
78        f.debug_struct("ETM_TASK_P7_CFG")
79            .field("gpio28_en", &self.gpio28_en())
80            .field("gpio29_en", &self.gpio29_en())
81            .field("gpio30_en", &self.gpio30_en())
82            .field("gpio28_sel", &self.gpio28_sel())
83            .field("gpio29_sel", &self.gpio29_sel())
84            .field("gpio30_sel", &self.gpio30_sel())
85            .finish()
86    }
87}
88impl W {
89    #[doc = "Enable bit of GPIO response etm task."]
90    #[doc = ""]
91    #[doc = "<div class=\"warning\">`n` is number of field in register. `n == 0` corresponds to `GPIO28_EN` field.</div>"]
92    #[inline(always)]
93    pub fn gpio_en(&mut self, n: u8) -> GPIO_EN_W<ETM_TASK_P7_CFG_SPEC> {
94        #[allow(clippy::no_effect)]
95        [(); 3][n as usize];
96        GPIO_EN_W::new(self, n * 8)
97    }
98    #[doc = "Bit 0 - Enable bit of GPIO response etm task."]
99    #[inline(always)]
100    pub fn gpio28_en(&mut self) -> GPIO_EN_W<ETM_TASK_P7_CFG_SPEC> {
101        GPIO_EN_W::new(self, 0)
102    }
103    #[doc = "Bit 8 - Enable bit of GPIO response etm task."]
104    #[inline(always)]
105    pub fn gpio29_en(&mut self) -> GPIO_EN_W<ETM_TASK_P7_CFG_SPEC> {
106        GPIO_EN_W::new(self, 8)
107    }
108    #[doc = "Bit 16 - Enable bit of GPIO response etm task."]
109    #[inline(always)]
110    pub fn gpio30_en(&mut self) -> GPIO_EN_W<ETM_TASK_P7_CFG_SPEC> {
111        GPIO_EN_W::new(self, 16)
112    }
113    #[doc = "GPIO choose a etm task channel."]
114    #[doc = ""]
115    #[doc = "<div class=\"warning\">`n` is number of field in register. `n == 0` corresponds to `GPIO28_SEL` field.</div>"]
116    #[inline(always)]
117    pub fn gpio_sel(&mut self, n: u8) -> GPIO_SEL_W<ETM_TASK_P7_CFG_SPEC> {
118        #[allow(clippy::no_effect)]
119        [(); 3][n as usize];
120        GPIO_SEL_W::new(self, n * 8 + 1)
121    }
122    #[doc = "Bits 1:3 - GPIO choose a etm task channel."]
123    #[inline(always)]
124    pub fn gpio28_sel(&mut self) -> GPIO_SEL_W<ETM_TASK_P7_CFG_SPEC> {
125        GPIO_SEL_W::new(self, 1)
126    }
127    #[doc = "Bits 9:11 - GPIO choose a etm task channel."]
128    #[inline(always)]
129    pub fn gpio29_sel(&mut self) -> GPIO_SEL_W<ETM_TASK_P7_CFG_SPEC> {
130        GPIO_SEL_W::new(self, 9)
131    }
132    #[doc = "Bits 17:19 - GPIO choose a etm task channel."]
133    #[inline(always)]
134    pub fn gpio30_sel(&mut self) -> GPIO_SEL_W<ETM_TASK_P7_CFG_SPEC> {
135        GPIO_SEL_W::new(self, 17)
136    }
137}
138#[doc = "Etm Configure Register to decide which GPIO been chosen\n\nYou can [`read`](crate::Reg::read) this register and get [`etm_task_p7_cfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`etm_task_p7_cfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
139pub struct ETM_TASK_P7_CFG_SPEC;
140impl crate::RegisterSpec for ETM_TASK_P7_CFG_SPEC {
141    type Ux = u32;
142}
143#[doc = "`read()` method returns [`etm_task_p7_cfg::R`](R) reader structure"]
144impl crate::Readable for ETM_TASK_P7_CFG_SPEC {}
145#[doc = "`write(|w| ..)` method takes [`etm_task_p7_cfg::W`](W) writer structure"]
146impl crate::Writable for ETM_TASK_P7_CFG_SPEC {
147    type Safety = crate::Unsafe;
148    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
149    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
150}
151#[doc = "`reset()` method sets ETM_TASK_P7_CFG to value 0"]
152impl crate::Resettable for ETM_TASK_P7_CFG_SPEC {
153    const RESET_VALUE: u32 = 0;
154}
esp32c6/gpio_sd/etm_task_p7_cfg.rs

esp32c6/gpio_sd/
etm_task_p7_cfg.rs
