esp32c6/soc_etm/
ch_ena_ad1_set.rs

1#[doc = "Register `CH_ENA_AD1_SET` writer"]
2pub type W = crate::W<CH_ENA_AD1_SET_SPEC>;
3#[doc = "Field `CH_SET(32-49)` writer - ch%s set"]
4pub type CH_SET_W<'a, REG> = crate::BitWriter<'a, REG>;
5#[cfg(feature = "impl-register-debug")]
6impl core::fmt::Debug for crate::generic::Reg<CH_ENA_AD1_SET_SPEC> {
7    fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
8        write!(f, "(not readable)")
9    }
10}
11impl W {
12    #[doc = "ch(32-49) set"]
13    #[doc = ""]
14    #[doc = "<div class=\"warning\">`n` is number of field in register. `n == 0` corresponds to `CH_SET32` field.</div>"]
15    #[inline(always)]
16    pub fn ch_set(&mut self, n: u8) -> CH_SET_W<CH_ENA_AD1_SET_SPEC> {
17        #[allow(clippy::no_effect)]
18        [(); 18][n as usize];
19        CH_SET_W::new(self, n)
20    }
21    #[doc = "Bit 0 - ch32 set"]
22    #[inline(always)]
23    pub fn ch_set32(&mut self) -> CH_SET_W<CH_ENA_AD1_SET_SPEC> {
24        CH_SET_W::new(self, 0)
25    }
26    #[doc = "Bit 1 - ch33 set"]
27    #[inline(always)]
28    pub fn ch_set33(&mut self) -> CH_SET_W<CH_ENA_AD1_SET_SPEC> {
29        CH_SET_W::new(self, 1)
30    }
31    #[doc = "Bit 2 - ch34 set"]
32    #[inline(always)]
33    pub fn ch_set34(&mut self) -> CH_SET_W<CH_ENA_AD1_SET_SPEC> {
34        CH_SET_W::new(self, 2)
35    }
36    #[doc = "Bit 3 - ch35 set"]
37    #[inline(always)]
38    pub fn ch_set35(&mut self) -> CH_SET_W<CH_ENA_AD1_SET_SPEC> {
39        CH_SET_W::new(self, 3)
40    }
41    #[doc = "Bit 4 - ch36 set"]
42    #[inline(always)]
43    pub fn ch_set36(&mut self) -> CH_SET_W<CH_ENA_AD1_SET_SPEC> {
44        CH_SET_W::new(self, 4)
45    }
46    #[doc = "Bit 5 - ch37 set"]
47    #[inline(always)]
48    pub fn ch_set37(&mut self) -> CH_SET_W<CH_ENA_AD1_SET_SPEC> {
49        CH_SET_W::new(self, 5)
50    }
51    #[doc = "Bit 6 - ch38 set"]
52    #[inline(always)]
53    pub fn ch_set38(&mut self) -> CH_SET_W<CH_ENA_AD1_SET_SPEC> {
54        CH_SET_W::new(self, 6)
55    }
56    #[doc = "Bit 7 - ch39 set"]
57    #[inline(always)]
58    pub fn ch_set39(&mut self) -> CH_SET_W<CH_ENA_AD1_SET_SPEC> {
59        CH_SET_W::new(self, 7)
60    }
61    #[doc = "Bit 8 - ch40 set"]
62    #[inline(always)]
63    pub fn ch_set40(&mut self) -> CH_SET_W<CH_ENA_AD1_SET_SPEC> {
64        CH_SET_W::new(self, 8)
65    }
66    #[doc = "Bit 9 - ch41 set"]
67    #[inline(always)]
68    pub fn ch_set41(&mut self) -> CH_SET_W<CH_ENA_AD1_SET_SPEC> {
69        CH_SET_W::new(self, 9)
70    }
71    #[doc = "Bit 10 - ch42 set"]
72    #[inline(always)]
73    pub fn ch_set42(&mut self) -> CH_SET_W<CH_ENA_AD1_SET_SPEC> {
74        CH_SET_W::new(self, 10)
75    }
76    #[doc = "Bit 11 - ch43 set"]
77    #[inline(always)]
78    pub fn ch_set43(&mut self) -> CH_SET_W<CH_ENA_AD1_SET_SPEC> {
79        CH_SET_W::new(self, 11)
80    }
81    #[doc = "Bit 12 - ch44 set"]
82    #[inline(always)]
83    pub fn ch_set44(&mut self) -> CH_SET_W<CH_ENA_AD1_SET_SPEC> {
84        CH_SET_W::new(self, 12)
85    }
86    #[doc = "Bit 13 - ch45 set"]
87    #[inline(always)]
88    pub fn ch_set45(&mut self) -> CH_SET_W<CH_ENA_AD1_SET_SPEC> {
89        CH_SET_W::new(self, 13)
90    }
91    #[doc = "Bit 14 - ch46 set"]
92    #[inline(always)]
93    pub fn ch_set46(&mut self) -> CH_SET_W<CH_ENA_AD1_SET_SPEC> {
94        CH_SET_W::new(self, 14)
95    }
96    #[doc = "Bit 15 - ch47 set"]
97    #[inline(always)]
98    pub fn ch_set47(&mut self) -> CH_SET_W<CH_ENA_AD1_SET_SPEC> {
99        CH_SET_W::new(self, 15)
100    }
101    #[doc = "Bit 16 - ch48 set"]
102    #[inline(always)]
103    pub fn ch_set48(&mut self) -> CH_SET_W<CH_ENA_AD1_SET_SPEC> {
104        CH_SET_W::new(self, 16)
105    }
106    #[doc = "Bit 17 - ch49 set"]
107    #[inline(always)]
108    pub fn ch_set49(&mut self) -> CH_SET_W<CH_ENA_AD1_SET_SPEC> {
109        CH_SET_W::new(self, 17)
110    }
111}
112#[doc = "channel enable set register\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch_ena_ad1_set::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
113pub struct CH_ENA_AD1_SET_SPEC;
114impl crate::RegisterSpec for CH_ENA_AD1_SET_SPEC {
115    type Ux = u32;
116}
117#[doc = "`write(|w| ..)` method takes [`ch_ena_ad1_set::W`](W) writer structure"]
118impl crate::Writable for CH_ENA_AD1_SET_SPEC {
119    type Safety = crate::Unsafe;
120    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
121    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
122}
123#[doc = "`reset()` method sets CH_ENA_AD1_SET to value 0"]
124impl crate::Resettable for CH_ENA_AD1_SET_SPEC {
125    const RESET_VALUE: u32 = 0;
126}
esp32c6/soc_etm/ch_ena_ad1_set.rs

esp32c6/soc_etm/
ch_ena_ad1_set.rs
