Module esp32c6::pcr::sysclk_conf

SYSCLK configuration register

Structs

• SYSCLK_CONF_SPEC
  SYSCLK configuration register

Type Aliases

• CLK_XTAL_FREQ_R
  Field CLK_XTAL_FREQ reader - This field indicates the frequency(MHz) of XTAL.
• HS_DIV_NUM_R
  Field HS_DIV_NUM reader - clk_hproot is div3 of SPLL if the clock-source is high-speed clock SPLL.
• LS_DIV_NUM_R
  Field LS_DIV_NUM reader - clk_hproot is div1 of low-speed clock-source if clck-source is a low-speed clock-source such as XTAL/FOSC.
• R
  Register SYSCLK_CONF reader
• SOC_CLK_SEL_R
  Field SOC_CLK_SEL reader - This field is used to select clock source. 0: XTAL, 1: SPLL, 2: FOSC, 3: reserved.
• SOC_CLK_SEL_W
  Field SOC_CLK_SEL writer - This field is used to select clock source. 0: XTAL, 1: SPLL, 2: FOSC, 3: reserved.
• W
  Register SYSCLK_CONF writer