Type Alias esp32c6::extmem::l1_cache_data_mem_power_ctrl::R
source · pub type R = R<L1_CACHE_DATA_MEM_POWER_CTRL_SPEC>;
Expand description
Register L1_CACHE_DATA_MEM_POWER_CTRL
reader
Aliased Type§
struct R { /* private fields */ }
Implementations§
source§impl R
impl R
sourcepub fn l1_icache0_data_mem_force_on(&self) -> L1_ICACHE0_DATA_MEM_FORCE_ON_R
pub fn l1_icache0_data_mem_force_on(&self) -> L1_ICACHE0_DATA_MEM_FORCE_ON_R
Bit 0 - The bit is used to close clock gating of L1-ICache0 data memory. 1: close gating, 0: open clock gating.
sourcepub fn l1_icache0_data_mem_force_pd(&self) -> L1_ICACHE0_DATA_MEM_FORCE_PD_R
pub fn l1_icache0_data_mem_force_pd(&self) -> L1_ICACHE0_DATA_MEM_FORCE_PD_R
Bit 1 - The bit is used to power L1-ICache0 data memory down. 0: follow rtc_lslp, 1: power down
sourcepub fn l1_icache0_data_mem_force_pu(&self) -> L1_ICACHE0_DATA_MEM_FORCE_PU_R
pub fn l1_icache0_data_mem_force_pu(&self) -> L1_ICACHE0_DATA_MEM_FORCE_PU_R
Bit 2 - The bit is used to power L1-ICache0 data memory up. 0: follow rtc_lslp, 1: power up
sourcepub fn l1_icache1_data_mem_force_on(&self) -> L1_ICACHE1_DATA_MEM_FORCE_ON_R
pub fn l1_icache1_data_mem_force_on(&self) -> L1_ICACHE1_DATA_MEM_FORCE_ON_R
Bit 4 - The bit is used to close clock gating of L1-ICache1 data memory. 1: close gating, 0: open clock gating.
sourcepub fn l1_icache1_data_mem_force_pd(&self) -> L1_ICACHE1_DATA_MEM_FORCE_PD_R
pub fn l1_icache1_data_mem_force_pd(&self) -> L1_ICACHE1_DATA_MEM_FORCE_PD_R
Bit 5 - The bit is used to power L1-ICache1 data memory down. 0: follow rtc_lslp, 1: power down
sourcepub fn l1_icache1_data_mem_force_pu(&self) -> L1_ICACHE1_DATA_MEM_FORCE_PU_R
pub fn l1_icache1_data_mem_force_pu(&self) -> L1_ICACHE1_DATA_MEM_FORCE_PU_R
Bit 6 - The bit is used to power L1-ICache1 data memory up. 0: follow rtc_lslp, 1: power up
sourcepub fn l1_icache2_data_mem_force_on(&self) -> L1_ICACHE2_DATA_MEM_FORCE_ON_R
pub fn l1_icache2_data_mem_force_on(&self) -> L1_ICACHE2_DATA_MEM_FORCE_ON_R
Bit 8 - Reserved
sourcepub fn l1_icache2_data_mem_force_pd(&self) -> L1_ICACHE2_DATA_MEM_FORCE_PD_R
pub fn l1_icache2_data_mem_force_pd(&self) -> L1_ICACHE2_DATA_MEM_FORCE_PD_R
Bit 9 - Reserved
sourcepub fn l1_icache2_data_mem_force_pu(&self) -> L1_ICACHE2_DATA_MEM_FORCE_PU_R
pub fn l1_icache2_data_mem_force_pu(&self) -> L1_ICACHE2_DATA_MEM_FORCE_PU_R
Bit 10 - Reserved
sourcepub fn l1_icache3_data_mem_force_on(&self) -> L1_ICACHE3_DATA_MEM_FORCE_ON_R
pub fn l1_icache3_data_mem_force_on(&self) -> L1_ICACHE3_DATA_MEM_FORCE_ON_R
Bit 12 - Reserved
sourcepub fn l1_icache3_data_mem_force_pd(&self) -> L1_ICACHE3_DATA_MEM_FORCE_PD_R
pub fn l1_icache3_data_mem_force_pd(&self) -> L1_ICACHE3_DATA_MEM_FORCE_PD_R
Bit 13 - Reserved
sourcepub fn l1_icache3_data_mem_force_pu(&self) -> L1_ICACHE3_DATA_MEM_FORCE_PU_R
pub fn l1_icache3_data_mem_force_pu(&self) -> L1_ICACHE3_DATA_MEM_FORCE_PU_R
Bit 14 - Reserved
sourcepub fn l1_cache_data_mem_force_on(&self) -> L1_CACHE_DATA_MEM_FORCE_ON_R
pub fn l1_cache_data_mem_force_on(&self) -> L1_CACHE_DATA_MEM_FORCE_ON_R
Bit 16 - The bit is used to close clock gating of L1-Cache data memory. 1: close gating, 0: open clock gating.
sourcepub fn l1_cache_data_mem_force_pd(&self) -> L1_CACHE_DATA_MEM_FORCE_PD_R
pub fn l1_cache_data_mem_force_pd(&self) -> L1_CACHE_DATA_MEM_FORCE_PD_R
Bit 17 - The bit is used to power L1-Cache data memory down. 0: follow rtc_lslp, 1: power down
sourcepub fn l1_cache_data_mem_force_pu(&self) -> L1_CACHE_DATA_MEM_FORCE_PU_R
pub fn l1_cache_data_mem_force_pu(&self) -> L1_CACHE_DATA_MEM_FORCE_PU_R
Bit 18 - The bit is used to power L1-Cache data memory up. 0: follow rtc_lslp, 1: power up