Type Alias esp32c6::pcr::parl_clk_tx_conf::W

pub type W = W<PARL_CLK_TX_CONF_SPEC>;

Register PARL_CLK_TX_CONF writer

Aliased Type

struct W { /* private fields */ }

Implementations

impl W

pub fn parl_clk_tx_div_num( &mut self ) -> PARL_CLK_TX_DIV_NUM_W<'_, PARL_CLK_TX_CONF_SPEC>

Bits 0:15 - The integral part of the frequency divider factor of the parl tx clock.

pub fn parl_clk_tx_sel( &mut self ) -> PARL_CLK_TX_SEL_W<'_, PARL_CLK_TX_CONF_SPEC>

Bits 16:17 - set this field to select clock-source. 0(default): XTAL, 1: 240MHz, 2: FOSC, 3: user clock from pad.

pub fn parl_clk_tx_en(&mut self) -> PARL_CLK_TX_EN_W<'_, PARL_CLK_TX_CONF_SPEC>

Bit 18 - Set 1 to enable parl tx clock

pub fn parl_tx_rst_en(&mut self) -> PARL_TX_RST_EN_W<'_, PARL_CLK_TX_CONF_SPEC>

Bit 19 - Set 0 to reset parl tx module