Expand description
Raw interrupt status
Structs§
- Raw interrupt status
Type Aliases§
- Field
CAP0
reader - The raw status bit for the interrupt triggered by capture on channel 0. - Field
CAP0
writer - The raw status bit for the interrupt triggered by capture on channel 0. - Field
CAP1
reader - The raw status bit for the interrupt triggered by capture on channel 1. - Field
CAP1
writer - The raw status bit for the interrupt triggered by capture on channel 1. - Field
CAP2
reader - The raw status bit for the interrupt triggered by capture on channel 2. - Field
CAP2
writer - The raw status bit for the interrupt triggered by capture on channel 2. - Field
CMPR0_TEA
reader - The raw status bit for the interrupt triggered by a PWM operator 0 TEA event - Field
CMPR0_TEA
writer - The raw status bit for the interrupt triggered by a PWM operator 0 TEA event - Field
CMPR0_TEB
reader - The raw status bit for the interrupt triggered by a PWM operator 0 TEB event - Field
CMPR0_TEB
writer - The raw status bit for the interrupt triggered by a PWM operator 0 TEB event - Field
CMPR1_TEA
reader - The raw status bit for the interrupt triggered by a PWM operator 1 TEA event - Field
CMPR1_TEA
writer - The raw status bit for the interrupt triggered by a PWM operator 1 TEA event - Field
CMPR1_TEB
reader - The raw status bit for the interrupt triggered by a PWM operator 1 TEB event - Field
CMPR1_TEB
writer - The raw status bit for the interrupt triggered by a PWM operator 1 TEB event - Field
CMPR2_TEA
reader - The raw status bit for the interrupt triggered by a PWM operator 2 TEA event - Field
CMPR2_TEA
writer - The raw status bit for the interrupt triggered by a PWM operator 2 TEA event - Field
CMPR2_TEB
reader - The raw status bit for the interrupt triggered by a PWM operator 2 TEB event - Field
CMPR2_TEB
writer - The raw status bit for the interrupt triggered by a PWM operator 2 TEB event - Field
FAULT0_CLR
reader - The raw status bit for the interrupt triggered when event_f0 ends. - Field
FAULT0_CLR
writer - The raw status bit for the interrupt triggered when event_f0 ends. - Field
FAULT0
reader - The raw status bit for the interrupt triggered when event_f0 starts. - Field
FAULT0
writer - The raw status bit for the interrupt triggered when event_f0 starts. - Field
FAULT1_CLR
reader - The raw status bit for the interrupt triggered when event_f1 ends. - Field
FAULT1_CLR
writer - The raw status bit for the interrupt triggered when event_f1 ends. - Field
FAULT1
reader - The raw status bit for the interrupt triggered when event_f1 starts. - Field
FAULT1
writer - The raw status bit for the interrupt triggered when event_f1 starts. - Field
FAULT2_CLR
reader - The raw status bit for the interrupt triggered when event_f2 ends. - Field
FAULT2_CLR
writer - The raw status bit for the interrupt triggered when event_f2 ends. - Field
FAULT2
reader - The raw status bit for the interrupt triggered when event_f2 starts. - Field
FAULT2
writer - The raw status bit for the interrupt triggered when event_f2 starts. - Register
INT_RAW
reader - Field
TIMER0_STOP
reader - The raw status bit for the interrupt triggered when the timer 0 stops. - Field
TIMER0_STOP
writer - The raw status bit for the interrupt triggered when the timer 0 stops. - Field
TIMER0_TEP
reader - The raw status bit for the interrupt triggered by a PWM timer 0 TEP event. - Field
TIMER0_TEP
writer - The raw status bit for the interrupt triggered by a PWM timer 0 TEP event. - Field
TIMER0_TEZ
reader - The raw status bit for the interrupt triggered by a PWM timer 0 TEZ event. - Field
TIMER0_TEZ
writer - The raw status bit for the interrupt triggered by a PWM timer 0 TEZ event. - Field
TIMER1_STOP
reader - The raw status bit for the interrupt triggered when the timer 1 stops. - Field
TIMER1_STOP
writer - The raw status bit for the interrupt triggered when the timer 1 stops. - Field
TIMER1_TEP
reader - The raw status bit for the interrupt triggered by a PWM timer 1 TEP event. - Field
TIMER1_TEP
writer - The raw status bit for the interrupt triggered by a PWM timer 1 TEP event. - Field
TIMER1_TEZ
reader - The raw status bit for the interrupt triggered by a PWM timer 1 TEZ event. - Field
TIMER1_TEZ
writer - The raw status bit for the interrupt triggered by a PWM timer 1 TEZ event. - Field
TIMER2_STOP
reader - The raw status bit for the interrupt triggered when the timer 2 stops. - Field
TIMER2_STOP
writer - The raw status bit for the interrupt triggered when the timer 2 stops. - Field
TIMER2_TEP
reader - The raw status bit for the interrupt triggered by a PWM timer 2 TEP event. - Field
TIMER2_TEP
writer - The raw status bit for the interrupt triggered by a PWM timer 2 TEP event. - Field
TIMER2_TEZ
reader - The raw status bit for the interrupt triggered by a PWM timer 2 TEZ event. - Field
TIMER2_TEZ
writer - The raw status bit for the interrupt triggered by a PWM timer 2 TEZ event. - Field
TZ0_CBC
reader - The raw status bit for the interrupt triggered by a cycle-by-cycle mode action on PWM0. - Field
TZ0_CBC
writer - The raw status bit for the interrupt triggered by a cycle-by-cycle mode action on PWM0. - Field
TZ0_OST
reader - The raw status bit for the interrupt triggered by a one-shot mode action on PWM0. - Field
TZ0_OST
writer - The raw status bit for the interrupt triggered by a one-shot mode action on PWM0. - Field
TZ1_CBC
reader - The raw status bit for the interrupt triggered by a cycle-by-cycle mode action on PWM1. - Field
TZ1_CBC
writer - The raw status bit for the interrupt triggered by a cycle-by-cycle mode action on PWM1. - Field
TZ1_OST
reader - The raw status bit for the interrupt triggered by a one-shot mode action on PWM1. - Field
TZ1_OST
writer - The raw status bit for the interrupt triggered by a one-shot mode action on PWM1. - Field
TZ2_CBC
reader - The raw status bit for the interrupt triggered by a cycle-by-cycle mode action on PWM2. - Field
TZ2_CBC
writer - The raw status bit for the interrupt triggered by a cycle-by-cycle mode action on PWM2. - Field
TZ2_OST
reader - The raw status bit for the interrupt triggered by a one-shot mode action on PWM2. - Field
TZ2_OST
writer - The raw status bit for the interrupt triggered by a one-shot mode action on PWM2. - Register
INT_RAW
writer