Module esp32c6::extmem::l1_cache_tag_mem_power_ctrl

Cache tag memory power control register

Structs

• L1_CACHE_TAG_MEM_POWER_CTRL_SPEC
  Cache tag memory power control register

Type Aliases

• L1_CACHE_TAG_MEM_FORCE_ON_R
  Field L1_CACHE_TAG_MEM_FORCE_ON reader - The bit is used to close clock gating of L1-Cache tag memory. 1: close gating, 0: open clock gating.
• L1_CACHE_TAG_MEM_FORCE_ON_W
  Field L1_CACHE_TAG_MEM_FORCE_ON writer - The bit is used to close clock gating of L1-Cache tag memory. 1: close gating, 0: open clock gating.
• L1_CACHE_TAG_MEM_FORCE_PD_R
  Field L1_CACHE_TAG_MEM_FORCE_PD reader - The bit is used to power L1-Cache tag memory down. 0: follow rtc_lslp, 1: power down
• L1_CACHE_TAG_MEM_FORCE_PD_W
  Field L1_CACHE_TAG_MEM_FORCE_PD writer - The bit is used to power L1-Cache tag memory down. 0: follow rtc_lslp, 1: power down
• L1_CACHE_TAG_MEM_FORCE_PU_R
  Field L1_CACHE_TAG_MEM_FORCE_PU reader - The bit is used to power L1-Cache tag memory up. 0: follow rtc_lslp, 1: power up
• L1_CACHE_TAG_MEM_FORCE_PU_W
  Field L1_CACHE_TAG_MEM_FORCE_PU writer - The bit is used to power L1-Cache tag memory up. 0: follow rtc_lslp, 1: power up
• L1_ICACHE0_TAG_MEM_FORCE_ON_R
  Field L1_ICACHE0_TAG_MEM_FORCE_ON reader - The bit is used to close clock gating of L1-ICache0 tag memory. 1: close gating, 0: open clock gating.
• L1_ICACHE0_TAG_MEM_FORCE_PD_R
  Field L1_ICACHE0_TAG_MEM_FORCE_PD reader - The bit is used to power L1-ICache0 tag memory down. 0: follow rtc_lslp, 1: power down
• L1_ICACHE0_TAG_MEM_FORCE_PU_R
  Field L1_ICACHE0_TAG_MEM_FORCE_PU reader - The bit is used to power L1-ICache0 tag memory up. 0: follow rtc_lslp, 1: power up
• L1_ICACHE1_TAG_MEM_FORCE_ON_R
  Field L1_ICACHE1_TAG_MEM_FORCE_ON reader - The bit is used to close clock gating of L1-ICache1 tag memory. 1: close gating, 0: open clock gating.
• L1_ICACHE1_TAG_MEM_FORCE_PD_R
  Field L1_ICACHE1_TAG_MEM_FORCE_PD reader - The bit is used to power L1-ICache1 tag memory down. 0: follow rtc_lslp, 1: power down
• L1_ICACHE1_TAG_MEM_FORCE_PU_R
  Field L1_ICACHE1_TAG_MEM_FORCE_PU reader - The bit is used to power L1-ICache1 tag memory up. 0: follow rtc_lslp, 1: power up
• L1_ICACHE2_TAG_MEM_FORCE_ON_R
  Field L1_ICACHE2_TAG_MEM_FORCE_ON reader - Reserved
• L1_ICACHE2_TAG_MEM_FORCE_PD_R
  Field L1_ICACHE2_TAG_MEM_FORCE_PD reader - Reserved
• L1_ICACHE2_TAG_MEM_FORCE_PU_R
  Field L1_ICACHE2_TAG_MEM_FORCE_PU reader - Reserved
• L1_ICACHE3_TAG_MEM_FORCE_ON_R
  Field L1_ICACHE3_TAG_MEM_FORCE_ON reader - Reserved
• L1_ICACHE3_TAG_MEM_FORCE_PD_R
  Field L1_ICACHE3_TAG_MEM_FORCE_PD reader - Reserved
• L1_ICACHE3_TAG_MEM_FORCE_PU_R
  Field L1_ICACHE3_TAG_MEM_FORCE_PU reader - Reserved
• R
  Register L1_CACHE_TAG_MEM_POWER_CTRL reader
• W
  Register L1_CACHE_TAG_MEM_POWER_CTRL writer