Struct esp32c6::MCPWM0

pub struct MCPWM0 { /* private fields */ }

Motor Control Pulse-Width Modulation 0

Implementations

impl MCPWM0

pub const PTR: *const RegisterBlock = {0x60014000 as *const mcpwm0::RegisterBlock}

Pointer to the register block

pub const fn ptr() -> *const RegisterBlock

Return the pointer to the register block

pub unsafe fn steal() -> Self

Steal an instance of this peripheral

Safety

Ensure that the new instance of the peripheral cannot be used in a way that may race with any existing instances, for example by only accessing read-only or write-only registers, or by consuming the original peripheral and using critical sections to coordinate access between multiple new instances.

Additionally, other software such as HALs may rely on only one peripheral instance existing to ensure memory safety; ensure no stolen instances are passed to such software.

Methods from Deref<Target = RegisterBlock>

pub fn clk_cfg(&self) -> &CLK_CFG

0x00 - PWM clock prescaler register.

pub fn timer(&self, n: usize) -> &TIMER

0x04..0x34 - Cluster TIMER%s, containing TIMER?_CFG0, TIMER?_CFG1, TIMER?_SYNC, TIMER?_STATUS

pub fn timer_iter(&self) -> impl Iterator<Item = &TIMER>

Iterator for array of: 0x04..0x34 - Cluster TIMER%s, containing TIMER?_CFG0, TIMER?_CFG1, TIMER?_SYNC, TIMER?_STATUS

pub fn timer_synci_cfg(&self) -> &TIMER_SYNCI_CFG

0x34 - Synchronization input selection for three PWM timers.

pub fn operator_timersel(&self) -> &OPERATOR_TIMERSEL

0x38 - Select specific timer for PWM operators.

pub fn ch(&self, n: usize) -> &CH

0x3c..0xe4 - Cluster CH%s, containing GEN?_STMP_CFG, GEN?_TSTMP_A, GEN?_TSTMP_B, GEN?_CFG0, GEN?_FORCE, GEN?_A, GEN?_B, DT?_CFG, DT?_FED_CFG, DT?_RED_CFG, CARRIER?_CFG, FH?_CFG0, FH?_CFG1, FH?_STATUS

pub fn ch_iter(&self) -> impl Iterator<Item = &CH>

Iterator for array of: 0x3c..0xe4 - Cluster CH%s, containing GEN?_STMP_CFG, GEN?_TSTMP_A, GEN?_TSTMP_B, GEN?_CFG0, GEN?_FORCE, GEN?_A, GEN?_B, DT?_CFG, DT?_FED_CFG, DT?_RED_CFG, CARRIER?_CFG, FH?_CFG0, FH?_CFG1, FH?_STATUS

pub fn fault_detect(&self) -> &FAULT_DETECT

0xe4 - Fault detection configuration and status

pub fn cap_timer_cfg(&self) -> &CAP_TIMER_CFG

0xe8 - Configure capture timer

pub fn cap_timer_phase(&self) -> &CAP_TIMER_PHASE

0xec - Phase for capture timer sync

pub fn cap_ch_cfg(&self, n: usize) -> &CAP_CH_CFG

0xf0..0xfc - Capture channel %s configuration and enable

pub fn cap_ch_cfg_iter(&self) -> impl Iterator<Item = &CAP_CH_CFG>

Iterator for array of: 0xf0..0xfc - Capture channel %s configuration and enable

pub fn cap_ch0_cfg(&self) -> &CAP_CH_CFG

0xf0 - Capture channel 0 configuration and enable

pub fn cap_ch1_cfg(&self) -> &CAP_CH_CFG

0xf4 - Capture channel 1 configuration and enable

pub fn cap_ch2_cfg(&self) -> &CAP_CH_CFG

0xf8 - Capture channel 2 configuration and enable

pub fn cap_ch(&self, n: usize) -> &CAP_CH

0xfc..0x108 - Value of last capture on channel %s

pub fn cap_ch_iter(&self) -> impl Iterator<Item = &CAP_CH>

Iterator for array of: 0xfc..0x108 - Value of last capture on channel %s

pub fn cap_status(&self) -> &CAP_STATUS

0x108 - Edge of last capture trigger

pub fn update_cfg(&self) -> &UPDATE_CFG

0x10c - Enable update.

pub fn int_ena(&self) -> &INT_ENA

0x110 - Interrupt enable bits

pub fn int_raw(&self) -> &INT_RAW

0x114 - Raw interrupt status

pub fn int_st(&self) -> &INT_ST

0x118 - Masked interrupt status

pub fn int_clr(&self) -> &INT_CLR

0x11c - Interrupt clear bits

pub fn evt_en(&self) -> &EVT_EN

0x120 - MCPWM event enable register

pub fn task_en(&self) -> &TASK_EN

0x124 - MCPWM task enable register

pub fn clk(&self) -> &CLK

0x128 - MCPWM APB configuration register

pub fn version(&self) -> &VERSION

0x12c - Version register.

Trait Implementations

impl Debug for MCPWM0

fn fmt(&self, f: &mut Formatter<'_>) -> Result

Formats the value using the given formatter.

impl Deref for MCPWM0

type Target = RegisterBlock

The resulting type after dereferencing.

fn deref(&self) -> &Self::Target

Dereferences the value.

impl Send for MCPWM0