Struct esp32c6::DMA

impl DMA

pub const PTR: const RegisterBlock = {0x60080000 as const dma::RegisterBlock}

Pointer to the register block

pub const fn ptr() -> *const RegisterBlock

Return the pointer to the register block

pub unsafe fn steal() -> Self

Steal an instance of this peripheral

§Safety

Ensure that the new instance of the peripheral cannot be used in a way that may race with any existing instances, for example by only accessing read-only or write-only registers, or by consuming the original peripheral and using critical sections to coordinate access between multiple new instances.

Additionally, other software such as HALs may rely on only one peripheral instance existing to ensure memory safety; ensure no stolen instances are passed to such software.

Methods from Deref<Target = RegisterBlock>§

pub fn in_int_raw_ch(&self, n: usize) -> &IN_INT_RAW_CH

0x00..0x0c - Raw status interrupt of channel 0

pub fn in_int_raw_ch_iter(&self) -> impl Iterator<Item = &IN_INT_RAW_CH>

Iterator for array of: 0x00..0x0c - Raw status interrupt of channel 0

pub fn in_int_st_ch(&self, n: usize) -> &IN_INT_ST_CH

0x04..0x10 - Masked interrupt of channel 0

pub fn in_int_st_ch_iter(&self) -> impl Iterator<Item = &IN_INT_ST_CH>

Iterator for array of: 0x04..0x10 - Masked interrupt of channel 0

pub fn in_int_ena_ch(&self, n: usize) -> &IN_INT_ENA_CH

0x08..0x14 - Interrupt enable bits of channel 0

pub fn in_int_ena_ch_iter(&self) -> impl Iterator<Item = &IN_INT_ENA_CH>

Iterator for array of: 0x08..0x14 - Interrupt enable bits of channel 0

pub fn in_int_clr_ch(&self, n: usize) -> &IN_INT_CLR_CH

0x0c..0x18 - Interrupt clear bits of channel 0

pub fn in_int_clr_ch_iter(&self) -> impl Iterator<Item = &IN_INT_CLR_CH>

Iterator for array of: 0x0c..0x18 - Interrupt clear bits of channel 0

pub fn out_int_raw_ch(&self, n: usize) -> &OUT_INT_RAW_CH

0x30..0x3c - Raw status interrupt of channel 0

pub fn out_int_raw_ch_iter(&self) -> impl Iterator<Item = &OUT_INT_RAW_CH>

Iterator for array of: 0x30..0x3c - Raw status interrupt of channel 0

pub fn out_int_st_ch(&self, n: usize) -> &OUT_INT_ST_CH

0x34..0x40 - Masked interrupt of channel 0

pub fn out_int_st_ch_iter(&self) -> impl Iterator<Item = &OUT_INT_ST_CH>

Iterator for array of: 0x34..0x40 - Masked interrupt of channel 0

pub fn out_int_ena_ch(&self, n: usize) -> &OUT_INT_ENA_CH

0x38..0x44 - Interrupt enable bits of channel 0

pub fn out_int_ena_ch_iter(&self) -> impl Iterator<Item = &OUT_INT_ENA_CH>

Iterator for array of: 0x38..0x44 - Interrupt enable bits of channel 0

pub fn out_int_clr_ch(&self, n: usize) -> &OUT_INT_CLR_CH

0x3c..0x48 - Interrupt clear bits of channel 0

pub fn out_int_clr_ch_iter(&self) -> impl Iterator<Item = &OUT_INT_CLR_CH>

Iterator for array of: 0x3c..0x48 - Interrupt clear bits of channel 0

pub fn ahb_test(&self) -> &AHB_TEST

0x60 - reserved

pub fn misc_conf(&self) -> &MISC_CONF

0x64 - MISC register

pub fn date(&self) -> &DATE

0x68 - Version control register

pub fn in_conf0_ch(&self, n: usize) -> &IN_CONF0_CH

0x70..0x7c - Configure 0 register of Rx channel 0

pub fn in_conf0_ch_iter(&self) -> impl Iterator<Item = &IN_CONF0_CH>

Iterator for array of: 0x70..0x7c - Configure 0 register of Rx channel 0

pub fn in_conf1_ch(&self, n: usize) -> &IN_CONF1_CH

0x74..0x80 - Configure 1 register of Rx channel 0

pub fn in_conf1_ch_iter(&self) -> impl Iterator<Item = &IN_CONF1_CH>

Iterator for array of: 0x74..0x80 - Configure 1 register of Rx channel 0

pub fn infifo_status_ch(&self, n: usize) -> &INFIFO_STATUS_CH

0x78..0x84 - Receive FIFO status of Rx channel 0

pub fn infifo_status_ch_iter(&self) -> impl Iterator<Item = &INFIFO_STATUS_CH>

Iterator for array of: 0x78..0x84 - Receive FIFO status of Rx channel 0

pub fn in_pop_ch(&self, n: usize) -> &IN_POP_CH

0x7c..0x88 - Pop control register of Rx channel 0

pub fn in_pop_ch_iter(&self) -> impl Iterator<Item = &IN_POP_CH>

Iterator for array of: 0x7c..0x88 - Pop control register of Rx channel 0

pub fn in_link_ch(&self, n: usize) -> &IN_LINK_CH

0x80..0x8c - Link descriptor configure and control register of Rx channel 0

pub fn in_link_ch_iter(&self) -> impl Iterator<Item = &IN_LINK_CH>

Iterator for array of: 0x80..0x8c - Link descriptor configure and control register of Rx channel 0

pub fn in_state_ch(&self, n: usize) -> &IN_STATE_CH

0x84..0x90 - Receive status of Rx channel 0

pub fn in_state_ch_iter(&self) -> impl Iterator<Item = &IN_STATE_CH>

Iterator for array of: 0x84..0x90 - Receive status of Rx channel 0

pub fn in_suc_eof_des_addr_ch(&self, n: usize) -> &IN_SUC_EOF_DES_ADDR_CH

0x88..0x94 - Inlink descriptor address when EOF occurs of Rx channel 0

pub fn in_suc_eof_des_addr_ch_iter( &self ) -> impl Iterator<Item = &IN_SUC_EOF_DES_ADDR_CH>

Iterator for array of: 0x88..0x94 - Inlink descriptor address when EOF occurs of Rx channel 0

pub fn in_err_eof_des_addr_ch(&self, n: usize) -> &IN_ERR_EOF_DES_ADDR_CH

0x8c..0x98 - Inlink descriptor address when errors occur of Rx channel 0

pub fn in_err_eof_des_addr_ch_iter( &self ) -> impl Iterator<Item = &IN_ERR_EOF_DES_ADDR_CH>

Iterator for array of: 0x8c..0x98 - Inlink descriptor address when errors occur of Rx channel 0

pub fn in_dscr_ch(&self, n: usize) -> &IN_DSCR_CH

0x90..0x9c - Current inlink descriptor address of Rx channel 0

pub fn in_dscr_ch_iter(&self) -> impl Iterator<Item = &IN_DSCR_CH>

Iterator for array of: 0x90..0x9c - Current inlink descriptor address of Rx channel 0

pub fn in_dscr_bf0_ch(&self, n: usize) -> &IN_DSCR_BF0_CH

0x94..0xa0 - The last inlink descriptor address of Rx channel 0

pub fn in_dscr_bf0_ch_iter(&self) -> impl Iterator<Item = &IN_DSCR_BF0_CH>

Iterator for array of: 0x94..0xa0 - The last inlink descriptor address of Rx channel 0

pub fn in_dscr_bf1_ch(&self, n: usize) -> &IN_DSCR_BF1_CH

0x98..0xa4 - The second-to-last inlink descriptor address of Rx channel 0

pub fn in_dscr_bf1_ch_iter(&self) -> impl Iterator<Item = &IN_DSCR_BF1_CH>

Iterator for array of: 0x98..0xa4 - The second-to-last inlink descriptor address of Rx channel 0

pub fn in_pri_ch(&self, n: usize) -> &IN_PRI_CH

0x9c..0xa8 - Priority register of Rx channel 0

pub fn in_pri_ch_iter(&self) -> impl Iterator<Item = &IN_PRI_CH>

Iterator for array of: 0x9c..0xa8 - Priority register of Rx channel 0

pub fn in_peri_sel_ch(&self, n: usize) -> &IN_PERI_SEL_CH

0xa0..0xac - Peripheral selection of Rx channel 0

pub fn in_peri_sel_ch_iter(&self) -> impl Iterator<Item = &IN_PERI_SEL_CH>

Iterator for array of: 0xa0..0xac - Peripheral selection of Rx channel 0

pub fn out_conf1_ch(&self, n: usize) -> &OUT_CONF1_CH

0xd4..0xe0 - Configure 1 register of Tx channel 0

pub fn out_conf1_ch_iter(&self) -> impl Iterator<Item = &OUT_CONF1_CH>

Iterator for array of: 0xd4..0xe0 - Configure 1 register of Tx channel 0

pub fn outfifo_status_ch(&self, n: usize) -> &OUTFIFO_STATUS_CH

0xd8..0xe4 - Transmit FIFO status of Tx channel 0

pub fn outfifo_status_ch_iter(&self) -> impl Iterator<Item = &OUTFIFO_STATUS_CH>

Iterator for array of: 0xd8..0xe4 - Transmit FIFO status of Tx channel 0

pub fn out_push_ch(&self, n: usize) -> &OUT_PUSH_CH

0xdc..0xe8 - Push control register of Rx channel 0

pub fn out_push_ch_iter(&self) -> impl Iterator<Item = &OUT_PUSH_CH>

Iterator for array of: 0xdc..0xe8 - Push control register of Rx channel 0

pub fn out_link_ch(&self, n: usize) -> &OUT_LINK_CH

0xe0..0xec - Link descriptor configure and control register of Tx channel 0

pub fn out_link_ch_iter(&self) -> impl Iterator<Item = &OUT_LINK_CH>

Iterator for array of: 0xe0..0xec - Link descriptor configure and control register of Tx channel 0

pub fn out_state_ch(&self, n: usize) -> &OUT_STATE_CH

0xe4..0xf0 - Transmit status of Tx channel 0

pub fn out_state_ch_iter(&self) -> impl Iterator<Item = &OUT_STATE_CH>

Iterator for array of: 0xe4..0xf0 - Transmit status of Tx channel 0

pub fn out_eof_des_addr_ch(&self, n: usize) -> &OUT_EOF_DES_ADDR_CH

0xe8..0xf4 - Outlink descriptor address when EOF occurs of Tx channel 0

pub fn out_eof_des_addr_ch_iter( &self ) -> impl Iterator<Item = &OUT_EOF_DES_ADDR_CH>

Iterator for array of: 0xe8..0xf4 - Outlink descriptor address when EOF occurs of Tx channel 0

pub fn out_eof_bfr_des_addr_ch(&self, n: usize) -> &OUT_EOF_BFR_DES_ADDR_CH

0xec..0xf8 - The last outlink descriptor address when EOF occurs of Tx channel 0

pub fn out_eof_bfr_des_addr_ch_iter( &self ) -> impl Iterator<Item = &OUT_EOF_BFR_DES_ADDR_CH>

Iterator for array of: 0xec..0xf8 - The last outlink descriptor address when EOF occurs of Tx channel 0

pub fn out_dscr_ch(&self, n: usize) -> &OUT_DSCR_CH

0xf0..0xfc - Current inlink descriptor address of Tx channel 0

pub fn out_dscr_ch_iter(&self) -> impl Iterator<Item = &OUT_DSCR_CH>

Iterator for array of: 0xf0..0xfc - Current inlink descriptor address of Tx channel 0

pub fn out_dscr_bf0_ch(&self, n: usize) -> &OUT_DSCR_BF0_CH

0xf4..0x100 - The last inlink descriptor address of Tx channel 0

pub fn out_dscr_bf0_ch_iter(&self) -> impl Iterator<Item = &OUT_DSCR_BF0_CH>

Iterator for array of: 0xf4..0x100 - The last inlink descriptor address of Tx channel 0

pub fn out_dscr_bf1_ch(&self, n: usize) -> &OUT_DSCR_BF1_CH

0xf8..0x104 - The second-to-last inlink descriptor address of Tx channel 0

pub fn out_dscr_bf1_ch_iter(&self) -> impl Iterator<Item = &OUT_DSCR_BF1_CH>

Iterator for array of: 0xf8..0x104 - The second-to-last inlink descriptor address of Tx channel 0

pub fn out_pri_ch(&self, n: usize) -> &OUT_PRI_CH

0xfc..0x108 - Priority register of Tx channel 0.

pub fn out_pri_ch_iter(&self) -> impl Iterator<Item = &OUT_PRI_CH>

Iterator for array of: 0xfc..0x108 - Priority register of Tx channel 0.

pub fn out_peri_sel_ch(&self, n: usize) -> &OUT_PERI_SEL_CH

0x100..0x10c - Peripheral selection of Tx channel 0

pub fn out_peri_sel_ch_iter(&self) -> impl Iterator<Item = &OUT_PERI_SEL_CH>

Iterator for array of: 0x100..0x10c - Peripheral selection of Tx channel 0

pub fn out_conf0_ch(&self, n: usize) -> &OUT_CONF0_CH

0x190..0x19c - Configure 0 register of Tx channel 1

pub fn out_conf0_ch_iter(&self) -> impl Iterator<Item = &OUT_CONF0_CH>

Iterator for array of: 0x190..0x19c - Configure 0 register of Tx channel 1

Trait Implementations§

impl Debug for DMA

fn fmt(&self, f: &mut Formatter<'_>) -> Result

Formats the value using the given formatter. Read more

impl Deref for DMA

type Target = RegisterBlock

The resulting type after dereferencing.

fn deref(&self) -> &Self::Target

Dereferences the value.

impl Send for DMA

Auto Trait Implementations§

impl UnwindSafe for DMA

Blanket Implementations§

impl<T> Any for T
where T: 'static + ?Sized,

fn type_id(&self) -> TypeId

Gets the TypeId of self. Read more

impl<T> Borrow<T> for T
where T: ?Sized,

fn borrow(&self) -> &T

Immutably borrows from an owned value. Read more

impl<T> BorrowMut<T> for T
where T: ?Sized,

fn borrow_mut(&mut self) -> &mut T

Mutably borrows from an owned value. Read more

impl<T> From<T> for T

fn from(t: T) -> T

Returns the argument unchanged.

impl<T, U> Into for T
where U: From<T>,

fn into(self) -> U

Calls U::from(self).

That is, this conversion is whatever the implementation of From<T> for U chooses to do.

impl<T, U> TryFrom for T
where U: Into<T>,

type Error = Infallible

The type returned in the event of a conversion error.

fn try_from(value: U) -> Result<T, <T as TryFrom>::Error>

Performs the conversion.

impl<T, U> TryInto for T
where U: TryFrom<T>,

type Error = >::Error

The type returned in the event of a conversion error.