Module esp32c6::pcr::timergroup0_timer_clk_conf

source ·
Expand description

TIMERGROUP0_TIMER_CLK configuration register

Structs

Type Aliases

  • R
    Register TIMERGROUP0_TIMER_CLK_CONF reader
  • TG0_TIMER_CLK_EN_R
    Field TG0_TIMER_CLK_EN reader - Set 1 to enable timer_group0 timer clock
  • TG0_TIMER_CLK_EN_W
    Field TG0_TIMER_CLK_EN writer - Set 1 to enable timer_group0 timer clock
  • TG0_TIMER_CLK_SEL_R
    Field TG0_TIMER_CLK_SEL reader - set this field to select clock-source. 0(default): XTAL, 1: 80MHz, 2: FOSC, 3: reserved.
  • TG0_TIMER_CLK_SEL_W
    Field TG0_TIMER_CLK_SEL writer - set this field to select clock-source. 0(default): XTAL, 1: 80MHz, 2: FOSC, 3: reserved.
  • W
    Register TIMERGROUP0_TIMER_CLK_CONF writer