Struct esp32c6::spi1::RegisterBlock

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#[repr(C)]
pub struct RegisterBlock { /* private fields */ }
Expand description

Register block

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impl RegisterBlock

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pub const fn spi_mem_cmd(&self) -> &SPI_MEM_CMD

0x00 - SPI1 memory command register

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pub const fn spi_mem_addr(&self) -> &SPI_MEM_ADDR

0x04 - SPI1 address register

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pub const fn spi_mem_ctrl(&self) -> &SPI_MEM_CTRL

0x08 - SPI1 control register.

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pub const fn spi_mem_ctrl1(&self) -> &SPI_MEM_CTRL1

0x0c - SPI1 control1 register.

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pub const fn spi_mem_ctrl2(&self) -> &SPI_MEM_CTRL2

0x10 - SPI1 control2 register.

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pub const fn spi_mem_clock(&self) -> &SPI_MEM_CLOCK

0x14 - SPI1 clock division control register.

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pub const fn spi_mem_user(&self) -> &SPI_MEM_USER

0x18 - SPI1 user register.

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pub const fn spi_mem_user1(&self) -> &SPI_MEM_USER1

0x1c - SPI1 user1 register.

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pub const fn spi_mem_user2(&self) -> &SPI_MEM_USER2

0x20 - SPI1 user2 register.

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pub const fn spi_mem_mosi_dlen(&self) -> &SPI_MEM_MOSI_DLEN

0x24 - SPI1 send data bit length control register.

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pub const fn spi_mem_miso_dlen(&self) -> &SPI_MEM_MISO_DLEN

0x28 - SPI1 receive data bit length control register.

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pub const fn spi_mem_rd_status(&self) -> &SPI_MEM_RD_STATUS

0x2c - SPI1 status register.

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pub const fn spi_mem_misc(&self) -> &SPI_MEM_MISC

0x34 - SPI1 misc register

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pub const fn spi_mem_tx_crc(&self) -> &SPI_MEM_TX_CRC

0x38 - SPI1 TX CRC data register.

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pub const fn spi_mem_cache_fctrl(&self) -> &SPI_MEM_CACHE_FCTRL

0x3c - SPI1 bit mode control register.

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pub const fn spi_mem_w0(&self) -> &SPI_MEM_W0

0x58 - SPI1 memory data buffer0

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pub const fn spi_mem_w1(&self) -> &SPI_MEM_W1

0x5c - SPI1 memory data buffer1

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pub const fn spi_mem_w2(&self) -> &SPI_MEM_W2

0x60 - SPI1 memory data buffer2

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pub const fn spi_mem_w3(&self) -> &SPI_MEM_W3

0x64 - SPI1 memory data buffer3

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pub const fn spi_mem_w4(&self) -> &SPI_MEM_W4

0x68 - SPI1 memory data buffer4

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pub const fn spi_mem_w5(&self) -> &SPI_MEM_W5

0x6c - SPI1 memory data buffer5

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pub const fn spi_mem_w6(&self) -> &SPI_MEM_W6

0x70 - SPI1 memory data buffer6

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pub const fn spi_mem_w7(&self) -> &SPI_MEM_W7

0x74 - SPI1 memory data buffer7

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pub const fn spi_mem_w8(&self) -> &SPI_MEM_W8

0x78 - SPI1 memory data buffer8

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pub const fn spi_mem_w9(&self) -> &SPI_MEM_W9

0x7c - SPI1 memory data buffer9

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pub const fn spi_mem_w10(&self) -> &SPI_MEM_W10

0x80 - SPI1 memory data buffer10

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pub const fn spi_mem_w11(&self) -> &SPI_MEM_W11

0x84 - SPI1 memory data buffer11

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pub const fn spi_mem_w12(&self) -> &SPI_MEM_W12

0x88 - SPI1 memory data buffer12

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pub const fn spi_mem_w13(&self) -> &SPI_MEM_W13

0x8c - SPI1 memory data buffer13

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pub const fn spi_mem_w14(&self) -> &SPI_MEM_W14

0x90 - SPI1 memory data buffer14

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pub const fn spi_mem_w15(&self) -> &SPI_MEM_W15

0x94 - SPI1 memory data buffer15

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pub const fn spi_mem_flash_waiti_ctrl(&self) -> &SPI_MEM_FLASH_WAITI_CTRL

0x98 - SPI1 wait idle control register

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pub const fn spi_mem_flash_sus_ctrl(&self) -> &SPI_MEM_FLASH_SUS_CTRL

0x9c - SPI1 flash suspend control register

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pub const fn spi_mem_flash_sus_cmd(&self) -> &SPI_MEM_FLASH_SUS_CMD

0xa0 - SPI1 flash suspend command register

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pub const fn spi_mem_sus_status(&self) -> &SPI_MEM_SUS_STATUS

0xa4 - SPI1 flash suspend status register

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pub const fn spi_mem_int_ena(&self) -> &SPI_MEM_INT_ENA

0xc0 - SPI1 interrupt enable register

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pub const fn spi_mem_int_clr(&self) -> &SPI_MEM_INT_CLR

0xc4 - SPI1 interrupt clear register

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pub const fn spi_mem_int_raw(&self) -> &SPI_MEM_INT_RAW

0xc8 - SPI1 interrupt raw register

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pub const fn spi_mem_int_st(&self) -> &SPI_MEM_INT_ST

0xcc - SPI1 interrupt status register

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pub const fn spi_mem_ddr(&self) -> &SPI_MEM_DDR

0xd4 - SPI1 DDR control register

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pub const fn spi_mem_timing_cali(&self) -> &SPI_MEM_TIMING_CALI

0x180 - SPI1 timing control register

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pub const fn spi_mem_clock_gate(&self) -> &SPI_MEM_CLOCK_GATE

0x200 - SPI1 clk_gate register

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pub const fn spi_mem_date(&self) -> &SPI_MEM_DATE

0x3fc - Version control register

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