1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327

#[doc = "Register `FH1_CFG0` reader"]
pub type R = crate::R<FH1_CFG0_SPEC>;
#[doc = "Register `FH1_CFG0` writer"]
pub type W = crate::W<FH1_CFG0_SPEC>;
#[doc = "Field `TZ1_SW_CBC` reader - Enable register for software force cycle-by-cycle mode action. 0: disable, 1: enable"]
pub type TZ1_SW_CBC_R = crate::BitReader;
#[doc = "Field `TZ1_SW_CBC` writer - Enable register for software force cycle-by-cycle mode action. 0: disable, 1: enable"]
pub type TZ1_SW_CBC_W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `TZ1_F2_CBC` reader - event_f2 will trigger cycle-by-cycle mode action. 0: disable, 1: enable"]
pub type TZ1_F2_CBC_R = crate::BitReader;
#[doc = "Field `TZ1_F2_CBC` writer - event_f2 will trigger cycle-by-cycle mode action. 0: disable, 1: enable"]
pub type TZ1_F2_CBC_W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `TZ1_F1_CBC` reader - event_f1 will trigger cycle-by-cycle mode action. 0: disable, 1: enable"]
pub type TZ1_F1_CBC_R = crate::BitReader;
#[doc = "Field `TZ1_F1_CBC` writer - event_f1 will trigger cycle-by-cycle mode action. 0: disable, 1: enable"]
pub type TZ1_F1_CBC_W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `TZ1_F0_CBC` reader - event_f0 will trigger cycle-by-cycle mode action. 0: disable, 1: enable"]
pub type TZ1_F0_CBC_R = crate::BitReader;
#[doc = "Field `TZ1_F0_CBC` writer - event_f0 will trigger cycle-by-cycle mode action. 0: disable, 1: enable"]
pub type TZ1_F0_CBC_W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `TZ1_SW_OST` reader - Enable register for software force one-shot mode action. 0: disable, 1: enable"]
pub type TZ1_SW_OST_R = crate::BitReader;
#[doc = "Field `TZ1_SW_OST` writer - Enable register for software force one-shot mode action. 0: disable, 1: enable"]
pub type TZ1_SW_OST_W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `TZ1_F2_OST` reader - event_f2 will trigger one-shot mode action. 0: disable, 1: enable"]
pub type TZ1_F2_OST_R = crate::BitReader;
#[doc = "Field `TZ1_F2_OST` writer - event_f2 will trigger one-shot mode action. 0: disable, 1: enable"]
pub type TZ1_F2_OST_W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `TZ1_F1_OST` reader - event_f1 will trigger one-shot mode action. 0: disable, 1: enable"]
pub type TZ1_F1_OST_R = crate::BitReader;
#[doc = "Field `TZ1_F1_OST` writer - event_f1 will trigger one-shot mode action. 0: disable, 1: enable"]
pub type TZ1_F1_OST_W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `TZ1_F0_OST` reader - event_f0 will trigger one-shot mode action. 0: disable, 1: enable"]
pub type TZ1_F0_OST_R = crate::BitReader;
#[doc = "Field `TZ1_F0_OST` writer - event_f0 will trigger one-shot mode action. 0: disable, 1: enable"]
pub type TZ1_F0_OST_W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `TZ1_A_CBC_D` reader - Cycle-by-cycle mode action on PWM1A when fault event occurs and timer is decreasing. 0: do nothing, 1: force low, 2: force high, 3: toggle"]
pub type TZ1_A_CBC_D_R = crate::FieldReader;
#[doc = "Field `TZ1_A_CBC_D` writer - Cycle-by-cycle mode action on PWM1A when fault event occurs and timer is decreasing. 0: do nothing, 1: force low, 2: force high, 3: toggle"]
pub type TZ1_A_CBC_D_W<'a, REG> = crate::FieldWriter<'a, REG, 2>;
#[doc = "Field `TZ1_A_CBC_U` reader - Cycle-by-cycle mode action on PWM1A when fault event occurs and timer is increasing. 0: do nothing, 1: force low, 2: force high, 3: toggle"]
pub type TZ1_A_CBC_U_R = crate::FieldReader;
#[doc = "Field `TZ1_A_CBC_U` writer - Cycle-by-cycle mode action on PWM1A when fault event occurs and timer is increasing. 0: do nothing, 1: force low, 2: force high, 3: toggle"]
pub type TZ1_A_CBC_U_W<'a, REG> = crate::FieldWriter<'a, REG, 2>;
#[doc = "Field `TZ1_A_OST_D` reader - One-shot mode action on PWM1A when fault event occurs and timer is decreasing. 0: do nothing,1: force low, 2: force high, 3: toggle"]
pub type TZ1_A_OST_D_R = crate::FieldReader;
#[doc = "Field `TZ1_A_OST_D` writer - One-shot mode action on PWM1A when fault event occurs and timer is decreasing. 0: do nothing,1: force low, 2: force high, 3: toggle"]
pub type TZ1_A_OST_D_W<'a, REG> = crate::FieldWriter<'a, REG, 2>;
#[doc = "Field `TZ1_A_OST_U` reader - One-shot mode action on PWM1A when fault event occurs and timer is increasing. 0: do nothing, 1: force low, 2: force high, 3: toggle"]
pub type TZ1_A_OST_U_R = crate::FieldReader;
#[doc = "Field `TZ1_A_OST_U` writer - One-shot mode action on PWM1A when fault event occurs and timer is increasing. 0: do nothing, 1: force low, 2: force high, 3: toggle"]
pub type TZ1_A_OST_U_W<'a, REG> = crate::FieldWriter<'a, REG, 2>;
#[doc = "Field `TZ1_B_CBC_D` reader - Cycle-by-cycle mode action on PWM1B when fault event occurs and timer is decreasing. 0: do nothing, 1: force low, 2: force high, 3: toggle"]
pub type TZ1_B_CBC_D_R = crate::FieldReader;
#[doc = "Field `TZ1_B_CBC_D` writer - Cycle-by-cycle mode action on PWM1B when fault event occurs and timer is decreasing. 0: do nothing, 1: force low, 2: force high, 3: toggle"]
pub type TZ1_B_CBC_D_W<'a, REG> = crate::FieldWriter<'a, REG, 2>;
#[doc = "Field `TZ1_B_CBC_U` reader - Cycle-by-cycle mode action on PWM1B when fault event occurs and timer is increasing. 0: do nothing, 1: force low, 2: force high, 3: toggle"]
pub type TZ1_B_CBC_U_R = crate::FieldReader;
#[doc = "Field `TZ1_B_CBC_U` writer - Cycle-by-cycle mode action on PWM1B when fault event occurs and timer is increasing. 0: do nothing, 1: force low, 2: force high, 3: toggle"]
pub type TZ1_B_CBC_U_W<'a, REG> = crate::FieldWriter<'a, REG, 2>;
#[doc = "Field `TZ1_B_OST_D` reader - One-shot mode action on PWM1B when fault event occurs and timer is decreasing. 0: do nothing, 1: force low, 2: force high, 3: toggle"]
pub type TZ1_B_OST_D_R = crate::FieldReader;
#[doc = "Field `TZ1_B_OST_D` writer - One-shot mode action on PWM1B when fault event occurs and timer is decreasing. 0: do nothing, 1: force low, 2: force high, 3: toggle"]
pub type TZ1_B_OST_D_W<'a, REG> = crate::FieldWriter<'a, REG, 2>;
#[doc = "Field `TZ1_B_OST_U` reader - One-shot mode action on PWM1B when fault event occurs and timer is increasing. 0: do nothing, 1: force low, 2: force high, 3: toggle"]
pub type TZ1_B_OST_U_R = crate::FieldReader;
#[doc = "Field `TZ1_B_OST_U` writer - One-shot mode action on PWM1B when fault event occurs and timer is increasing. 0: do nothing, 1: force low, 2: force high, 3: toggle"]
pub type TZ1_B_OST_U_W<'a, REG> = crate::FieldWriter<'a, REG, 2>;
impl R {
    #[doc = "Bit 0 - Enable register for software force cycle-by-cycle mode action. 0: disable, 1: enable"]
    #[inline(always)]
    pub fn tz1_sw_cbc(&self) -> TZ1_SW_CBC_R {
        TZ1_SW_CBC_R::new((self.bits & 1) != 0)
    }
    #[doc = "Bit 1 - event_f2 will trigger cycle-by-cycle mode action. 0: disable, 1: enable"]
    #[inline(always)]
    pub fn tz1_f2_cbc(&self) -> TZ1_F2_CBC_R {
        TZ1_F2_CBC_R::new(((self.bits >> 1) & 1) != 0)
    }
    #[doc = "Bit 2 - event_f1 will trigger cycle-by-cycle mode action. 0: disable, 1: enable"]
    #[inline(always)]
    pub fn tz1_f1_cbc(&self) -> TZ1_F1_CBC_R {
        TZ1_F1_CBC_R::new(((self.bits >> 2) & 1) != 0)
    }
    #[doc = "Bit 3 - event_f0 will trigger cycle-by-cycle mode action. 0: disable, 1: enable"]
    #[inline(always)]
    pub fn tz1_f0_cbc(&self) -> TZ1_F0_CBC_R {
        TZ1_F0_CBC_R::new(((self.bits >> 3) & 1) != 0)
    }
    #[doc = "Bit 4 - Enable register for software force one-shot mode action. 0: disable, 1: enable"]
    #[inline(always)]
    pub fn tz1_sw_ost(&self) -> TZ1_SW_OST_R {
        TZ1_SW_OST_R::new(((self.bits >> 4) & 1) != 0)
    }
    #[doc = "Bit 5 - event_f2 will trigger one-shot mode action. 0: disable, 1: enable"]
    #[inline(always)]
    pub fn tz1_f2_ost(&self) -> TZ1_F2_OST_R {
        TZ1_F2_OST_R::new(((self.bits >> 5) & 1) != 0)
    }
    #[doc = "Bit 6 - event_f1 will trigger one-shot mode action. 0: disable, 1: enable"]
    #[inline(always)]
    pub fn tz1_f1_ost(&self) -> TZ1_F1_OST_R {
        TZ1_F1_OST_R::new(((self.bits >> 6) & 1) != 0)
    }
    #[doc = "Bit 7 - event_f0 will trigger one-shot mode action. 0: disable, 1: enable"]
    #[inline(always)]
    pub fn tz1_f0_ost(&self) -> TZ1_F0_OST_R {
        TZ1_F0_OST_R::new(((self.bits >> 7) & 1) != 0)
    }
    #[doc = "Bits 8:9 - Cycle-by-cycle mode action on PWM1A when fault event occurs and timer is decreasing. 0: do nothing, 1: force low, 2: force high, 3: toggle"]
    #[inline(always)]
    pub fn tz1_a_cbc_d(&self) -> TZ1_A_CBC_D_R {
        TZ1_A_CBC_D_R::new(((self.bits >> 8) & 3) as u8)
    }
    #[doc = "Bits 10:11 - Cycle-by-cycle mode action on PWM1A when fault event occurs and timer is increasing. 0: do nothing, 1: force low, 2: force high, 3: toggle"]
    #[inline(always)]
    pub fn tz1_a_cbc_u(&self) -> TZ1_A_CBC_U_R {
        TZ1_A_CBC_U_R::new(((self.bits >> 10) & 3) as u8)
    }
    #[doc = "Bits 12:13 - One-shot mode action on PWM1A when fault event occurs and timer is decreasing. 0: do nothing,1: force low, 2: force high, 3: toggle"]
    #[inline(always)]
    pub fn tz1_a_ost_d(&self) -> TZ1_A_OST_D_R {
        TZ1_A_OST_D_R::new(((self.bits >> 12) & 3) as u8)
    }
    #[doc = "Bits 14:15 - One-shot mode action on PWM1A when fault event occurs and timer is increasing. 0: do nothing, 1: force low, 2: force high, 3: toggle"]
    #[inline(always)]
    pub fn tz1_a_ost_u(&self) -> TZ1_A_OST_U_R {
        TZ1_A_OST_U_R::new(((self.bits >> 14) & 3) as u8)
    }
    #[doc = "Bits 16:17 - Cycle-by-cycle mode action on PWM1B when fault event occurs and timer is decreasing. 0: do nothing, 1: force low, 2: force high, 3: toggle"]
    #[inline(always)]
    pub fn tz1_b_cbc_d(&self) -> TZ1_B_CBC_D_R {
        TZ1_B_CBC_D_R::new(((self.bits >> 16) & 3) as u8)
    }
    #[doc = "Bits 18:19 - Cycle-by-cycle mode action on PWM1B when fault event occurs and timer is increasing. 0: do nothing, 1: force low, 2: force high, 3: toggle"]
    #[inline(always)]
    pub fn tz1_b_cbc_u(&self) -> TZ1_B_CBC_U_R {
        TZ1_B_CBC_U_R::new(((self.bits >> 18) & 3) as u8)
    }
    #[doc = "Bits 20:21 - One-shot mode action on PWM1B when fault event occurs and timer is decreasing. 0: do nothing, 1: force low, 2: force high, 3: toggle"]
    #[inline(always)]
    pub fn tz1_b_ost_d(&self) -> TZ1_B_OST_D_R {
        TZ1_B_OST_D_R::new(((self.bits >> 20) & 3) as u8)
    }
    #[doc = "Bits 22:23 - One-shot mode action on PWM1B when fault event occurs and timer is increasing. 0: do nothing, 1: force low, 2: force high, 3: toggle"]
    #[inline(always)]
    pub fn tz1_b_ost_u(&self) -> TZ1_B_OST_U_R {
        TZ1_B_OST_U_R::new(((self.bits >> 22) & 3) as u8)
    }
}
#[cfg(feature = "impl-register-debug")]
impl core::fmt::Debug for R {
    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
        f.debug_struct("FH1_CFG0")
            .field("tz1_sw_cbc", &format_args!("{}", self.tz1_sw_cbc().bit()))
            .field("tz1_f2_cbc", &format_args!("{}", self.tz1_f2_cbc().bit()))
            .field("tz1_f1_cbc", &format_args!("{}", self.tz1_f1_cbc().bit()))
            .field("tz1_f0_cbc", &format_args!("{}", self.tz1_f0_cbc().bit()))
            .field("tz1_sw_ost", &format_args!("{}", self.tz1_sw_ost().bit()))
            .field("tz1_f2_ost", &format_args!("{}", self.tz1_f2_ost().bit()))
            .field("tz1_f1_ost", &format_args!("{}", self.tz1_f1_ost().bit()))
            .field("tz1_f0_ost", &format_args!("{}", self.tz1_f0_ost().bit()))
            .field(
                "tz1_a_cbc_d",
                &format_args!("{}", self.tz1_a_cbc_d().bits()),
            )
            .field(
                "tz1_a_cbc_u",
                &format_args!("{}", self.tz1_a_cbc_u().bits()),
            )
            .field(
                "tz1_a_ost_d",
                &format_args!("{}", self.tz1_a_ost_d().bits()),
            )
            .field(
                "tz1_a_ost_u",
                &format_args!("{}", self.tz1_a_ost_u().bits()),
            )
            .field(
                "tz1_b_cbc_d",
                &format_args!("{}", self.tz1_b_cbc_d().bits()),
            )
            .field(
                "tz1_b_cbc_u",
                &format_args!("{}", self.tz1_b_cbc_u().bits()),
            )
            .field(
                "tz1_b_ost_d",
                &format_args!("{}", self.tz1_b_ost_d().bits()),
            )
            .field(
                "tz1_b_ost_u",
                &format_args!("{}", self.tz1_b_ost_u().bits()),
            )
            .finish()
    }
}
#[cfg(feature = "impl-register-debug")]
impl core::fmt::Debug for crate::generic::Reg<FH1_CFG0_SPEC> {
    fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
        core::fmt::Debug::fmt(&self.read(), f)
    }
}
impl W {
    #[doc = "Bit 0 - Enable register for software force cycle-by-cycle mode action. 0: disable, 1: enable"]
    #[inline(always)]
    #[must_use]
    pub fn tz1_sw_cbc(&mut self) -> TZ1_SW_CBC_W<FH1_CFG0_SPEC> {
        TZ1_SW_CBC_W::new(self, 0)
    }
    #[doc = "Bit 1 - event_f2 will trigger cycle-by-cycle mode action. 0: disable, 1: enable"]
    #[inline(always)]
    #[must_use]
    pub fn tz1_f2_cbc(&mut self) -> TZ1_F2_CBC_W<FH1_CFG0_SPEC> {
        TZ1_F2_CBC_W::new(self, 1)
    }
    #[doc = "Bit 2 - event_f1 will trigger cycle-by-cycle mode action. 0: disable, 1: enable"]
    #[inline(always)]
    #[must_use]
    pub fn tz1_f1_cbc(&mut self) -> TZ1_F1_CBC_W<FH1_CFG0_SPEC> {
        TZ1_F1_CBC_W::new(self, 2)
    }
    #[doc = "Bit 3 - event_f0 will trigger cycle-by-cycle mode action. 0: disable, 1: enable"]
    #[inline(always)]
    #[must_use]
    pub fn tz1_f0_cbc(&mut self) -> TZ1_F0_CBC_W<FH1_CFG0_SPEC> {
        TZ1_F0_CBC_W::new(self, 3)
    }
    #[doc = "Bit 4 - Enable register for software force one-shot mode action. 0: disable, 1: enable"]
    #[inline(always)]
    #[must_use]
    pub fn tz1_sw_ost(&mut self) -> TZ1_SW_OST_W<FH1_CFG0_SPEC> {
        TZ1_SW_OST_W::new(self, 4)
    }
    #[doc = "Bit 5 - event_f2 will trigger one-shot mode action. 0: disable, 1: enable"]
    #[inline(always)]
    #[must_use]
    pub fn tz1_f2_ost(&mut self) -> TZ1_F2_OST_W<FH1_CFG0_SPEC> {
        TZ1_F2_OST_W::new(self, 5)
    }
    #[doc = "Bit 6 - event_f1 will trigger one-shot mode action. 0: disable, 1: enable"]
    #[inline(always)]
    #[must_use]
    pub fn tz1_f1_ost(&mut self) -> TZ1_F1_OST_W<FH1_CFG0_SPEC> {
        TZ1_F1_OST_W::new(self, 6)
    }
    #[doc = "Bit 7 - event_f0 will trigger one-shot mode action. 0: disable, 1: enable"]
    #[inline(always)]
    #[must_use]
    pub fn tz1_f0_ost(&mut self) -> TZ1_F0_OST_W<FH1_CFG0_SPEC> {
        TZ1_F0_OST_W::new(self, 7)
    }
    #[doc = "Bits 8:9 - Cycle-by-cycle mode action on PWM1A when fault event occurs and timer is decreasing. 0: do nothing, 1: force low, 2: force high, 3: toggle"]
    #[inline(always)]
    #[must_use]
    pub fn tz1_a_cbc_d(&mut self) -> TZ1_A_CBC_D_W<FH1_CFG0_SPEC> {
        TZ1_A_CBC_D_W::new(self, 8)
    }
    #[doc = "Bits 10:11 - Cycle-by-cycle mode action on PWM1A when fault event occurs and timer is increasing. 0: do nothing, 1: force low, 2: force high, 3: toggle"]
    #[inline(always)]
    #[must_use]
    pub fn tz1_a_cbc_u(&mut self) -> TZ1_A_CBC_U_W<FH1_CFG0_SPEC> {
        TZ1_A_CBC_U_W::new(self, 10)
    }
    #[doc = "Bits 12:13 - One-shot mode action on PWM1A when fault event occurs and timer is decreasing. 0: do nothing,1: force low, 2: force high, 3: toggle"]
    #[inline(always)]
    #[must_use]
    pub fn tz1_a_ost_d(&mut self) -> TZ1_A_OST_D_W<FH1_CFG0_SPEC> {
        TZ1_A_OST_D_W::new(self, 12)
    }
    #[doc = "Bits 14:15 - One-shot mode action on PWM1A when fault event occurs and timer is increasing. 0: do nothing, 1: force low, 2: force high, 3: toggle"]
    #[inline(always)]
    #[must_use]
    pub fn tz1_a_ost_u(&mut self) -> TZ1_A_OST_U_W<FH1_CFG0_SPEC> {
        TZ1_A_OST_U_W::new(self, 14)
    }
    #[doc = "Bits 16:17 - Cycle-by-cycle mode action on PWM1B when fault event occurs and timer is decreasing. 0: do nothing, 1: force low, 2: force high, 3: toggle"]
    #[inline(always)]
    #[must_use]
    pub fn tz1_b_cbc_d(&mut self) -> TZ1_B_CBC_D_W<FH1_CFG0_SPEC> {
        TZ1_B_CBC_D_W::new(self, 16)
    }
    #[doc = "Bits 18:19 - Cycle-by-cycle mode action on PWM1B when fault event occurs and timer is increasing. 0: do nothing, 1: force low, 2: force high, 3: toggle"]
    #[inline(always)]
    #[must_use]
    pub fn tz1_b_cbc_u(&mut self) -> TZ1_B_CBC_U_W<FH1_CFG0_SPEC> {
        TZ1_B_CBC_U_W::new(self, 18)
    }
    #[doc = "Bits 20:21 - One-shot mode action on PWM1B when fault event occurs and timer is decreasing. 0: do nothing, 1: force low, 2: force high, 3: toggle"]
    #[inline(always)]
    #[must_use]
    pub fn tz1_b_ost_d(&mut self) -> TZ1_B_OST_D_W<FH1_CFG0_SPEC> {
        TZ1_B_OST_D_W::new(self, 20)
    }
    #[doc = "Bits 22:23 - One-shot mode action on PWM1B when fault event occurs and timer is increasing. 0: do nothing, 1: force low, 2: force high, 3: toggle"]
    #[inline(always)]
    #[must_use]
    pub fn tz1_b_ost_u(&mut self) -> TZ1_B_OST_U_W<FH1_CFG0_SPEC> {
        TZ1_B_OST_U_W::new(self, 22)
    }
    #[doc = r" Writes raw bits to the register."]
    #[doc = r""]
    #[doc = r" # Safety"]
    #[doc = r""]
    #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"]
    #[inline(always)]
    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
        self.bits = bits;
        self
    }
}
#[doc = "Actions on PWM1A and PWM1B trip events\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`fh1_cfg0::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`fh1_cfg0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
pub struct FH1_CFG0_SPEC;
impl crate::RegisterSpec for FH1_CFG0_SPEC {
    type Ux = u32;
}
#[doc = "`read()` method returns [`fh1_cfg0::R`](R) reader structure"]
impl crate::Readable for FH1_CFG0_SPEC {}
#[doc = "`write(|w| ..)` method takes [`fh1_cfg0::W`](W) writer structure"]
impl crate::Writable for FH1_CFG0_SPEC {
    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
}
#[doc = "`reset()` method sets FH1_CFG0 to value 0"]
impl crate::Resettable for FH1_CFG0_SPEC {
    const RESET_VALUE: Self::Ux = 0;
}