Struct esp32c6::extmem::l1_icache0_preload_addr::L1_ICACHE0_PRELOAD_ADDR_SPEC

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pub struct L1_ICACHE0_PRELOAD_ADDR_SPEC;
Expand description

L1 instruction Cache 0 preload address configure register

You can read this register and get l1_icache0_preload_addr::R. See API.

Trait Implementations§

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impl RegisterSpec for L1_ICACHE0_PRELOAD_ADDR_SPEC

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type Ux = u32

Raw register type (u8, u16, u32, …).
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impl Resettable for L1_ICACHE0_PRELOAD_ADDR_SPEC

reset() method sets L1_ICACHE0_PRELOAD_ADDR to value 0

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const RESET_VALUE: Self::Ux = {transmute(0x00000000): <extmem::l1_icache0_preload_addr::L1_ICACHE0_PRELOAD_ADDR_SPEC as generic::RegisterSpec>::Ux}

Reset value of the register.
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fn reset_value() -> Self::Ux

Reset value of the register.
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impl Readable for L1_ICACHE0_PRELOAD_ADDR_SPEC

read() method returns l1_icache0_preload_addr::R reader structure

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