Module lp_uart

Source

Expand description

Low-power UART (Universal Asynchronous Receiver-Transmitter) Controller

Modules§

afifo_status: UART AFIFO Status
at_cmd_char_sync: AT escape sequence detection configuration
at_cmd_gaptout_sync: Timeout configuration
at_cmd_postcnt_sync: Post-sequence timing configuration
at_cmd_precnt_sync: Pre-sequence timing configuration
clk_conf: UART core clock configuration
clkdiv_sync: Clock divider configuration
conf0_sync: Configuration register 0
conf1: Configuration register 1
date: UART Version register
fifo: FIFO data register
fsm_status: UART transmit and receive status.
hwfc_conf_sync: Hardware flow-control configuration
id: UART ID register
idle_conf_sync: Frame-end idle configuration
int_clr: Interrupt clear bits
int_ena: Interrupt enable bits
int_raw: Raw interrupt status
int_st: Masked interrupt status
mem_conf: UART memory power configuration
mem_rx_status: Rx-SRAM write and read offset address.
mem_tx_status: Tx-SRAM write and read offset address.
reg_update: UART Registers Configuration Update register
rs485_conf_sync: RS485 mode configuration
rx_filt: Rx Filter configuration
sleep_conf0: UART sleep configure register 0
sleep_conf1: UART sleep configure register 1
sleep_conf2: UART sleep configure register 2
status: UART status register
swfc_conf0_sync: Software flow-control character configuration
swfc_conf1: Software flow-control character configuration
tout_conf_sync: UART threshold and allocation configuration
txbrk_conf_sync: Tx Break character configuration

Structs§

RegisterBlock: Register block

Type Aliases§

AFIFO_STATUS: AFIFO_STATUS (r) register accessor: UART AFIFO Status
AT_CMD_CHAR_SYNC: AT_CMD_CHAR_SYNC (rw) register accessor: AT escape sequence detection configuration
AT_CMD_GAPTOUT_SYNC: AT_CMD_GAPTOUT_SYNC (rw) register accessor: Timeout configuration
AT_CMD_POSTCNT_SYNC: AT_CMD_POSTCNT_SYNC (rw) register accessor: Post-sequence timing configuration
AT_CMD_PRECNT_SYNC: AT_CMD_PRECNT_SYNC (rw) register accessor: Pre-sequence timing configuration
CLKDIV_SYNC: CLKDIV_SYNC (rw) register accessor: Clock divider configuration
CLK_CONF: CLK_CONF (rw) register accessor: UART core clock configuration
CONF0_SYNC: CONF0_SYNC (rw) register accessor: Configuration register 0
CONF1: CONF1 (rw) register accessor: Configuration register 1
DATE: DATE (rw) register accessor: UART Version register
FIFO: FIFO (rw) register accessor: FIFO data register
FSM_STATUS: FSM_STATUS (r) register accessor: UART transmit and receive status.
HWFC_CONF_SYNC: HWFC_CONF_SYNC (rw) register accessor: Hardware flow-control configuration
ID: ID (rw) register accessor: UART ID register
IDLE_CONF_SYNC: IDLE_CONF_SYNC (rw) register accessor: Frame-end idle configuration
INT_CLR: INT_CLR (w) register accessor: Interrupt clear bits
INT_ENA: INT_ENA (rw) register accessor: Interrupt enable bits
INT_RAW: INT_RAW (rw) register accessor: Raw interrupt status
INT_ST: INT_ST (r) register accessor: Masked interrupt status
MEM_CONF: MEM_CONF (rw) register accessor: UART memory power configuration
MEM_RX_STATUS: MEM_RX_STATUS (r) register accessor: Rx-SRAM write and read offset address.
MEM_TX_STATUS: MEM_TX_STATUS (r) register accessor: Tx-SRAM write and read offset address.
REG_UPDATE: REG_UPDATE (rw) register accessor: UART Registers Configuration Update register
RS485_CONF_SYNC: RS485_CONF_SYNC (rw) register accessor: RS485 mode configuration
RX_FILT: RX_FILT (rw) register accessor: Rx Filter configuration
SLEEP_CONF0: SLEEP_CONF0 (rw) register accessor: UART sleep configure register 0
SLEEP_CONF1: SLEEP_CONF1 (rw) register accessor: UART sleep configure register 1
SLEEP_CONF2: SLEEP_CONF2 (rw) register accessor: UART sleep configure register 2
STATUS: STATUS (r) register accessor: UART status register
SWFC_CONF0_SYNC: SWFC_CONF0_SYNC (rw) register accessor: Software flow-control character configuration
SWFC_CONF1: SWFC_CONF1 (rw) register accessor: Software flow-control character configuration
TOUT_CONF_SYNC: TOUT_CONF_SYNC (rw) register accessor: UART threshold and allocation configuration
TXBRK_CONF_SYNC: TXBRK_CONF_SYNC (rw) register accessor: Tx Break character configuration

Module lp_uartCopy item path

Modules§

Structs§

Type Aliases§

Module lp_uart