Type Alias esp32c6_lp::lp_i2c::ctr::W

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pub type W = W<CTR_SPEC>;
Expand description

Register CTR writer

Aliased Type§

struct W { /* private fields */ }

Implementations§

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impl W

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pub fn sda_force_out(&mut self) -> SDA_FORCE_OUT_W<'_, CTR_SPEC>

Bit 0 - 1: direct output, 0: open drain output.

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pub fn scl_force_out(&mut self) -> SCL_FORCE_OUT_W<'_, CTR_SPEC>

Bit 1 - 1: direct output, 0: open drain output.

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pub fn sample_scl_level(&mut self) -> SAMPLE_SCL_LEVEL_W<'_, CTR_SPEC>

Bit 2 - This register is used to select the sample mode. 1: sample SDA data on the SCL low level. 0: sample SDA data on the SCL high level.

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pub fn rx_full_ack_level(&mut self) -> RX_FULL_ACK_LEVEL_W<'_, CTR_SPEC>

Bit 3 - This register is used to configure the ACK value that need to sent by master when the rx_fifo_cnt has reached the threshold.

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pub fn trans_start(&mut self) -> TRANS_START_W<'_, CTR_SPEC>

Bit 5 - Set this bit to start sending the data in txfifo.

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pub fn tx_lsb_first(&mut self) -> TX_LSB_FIRST_W<'_, CTR_SPEC>

Bit 6 - This bit is used to control the sending mode for data needing to be sent. 1: send data from the least significant bit, 0: send data from the most significant bit.

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pub fn rx_lsb_first(&mut self) -> RX_LSB_FIRST_W<'_, CTR_SPEC>

Bit 7 - This bit is used to control the storage mode for received data. 1: receive data from the least significant bit, 0: receive data from the most significant bit.

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pub fn clk_en(&mut self) -> CLK_EN_W<'_, CTR_SPEC>

Bit 8 - Reserved

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pub fn arbitration_en(&mut self) -> ARBITRATION_EN_W<'_, CTR_SPEC>

Bit 9 - This is the enable bit for arbitration_lost.

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pub fn fsm_rst(&mut self) -> FSM_RST_W<'_, CTR_SPEC>

Bit 10 - This register is used to reset the scl FMS.

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pub fn conf_upgate(&mut self) -> CONF_UPGATE_W<'_, CTR_SPEC>

Bit 11 - synchronization bit

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pub unsafe fn bits(&mut self, bits: u32) -> &mut Self

Writes raw bits to the register.

Safety

Passing incorrect value can cause undefined behaviour. See reference manual