Struct LEDC

pub struct LEDC { /* private fields */ }

Implementations

impl LEDC

pub const PTR: *const <LEDC as Deref>::Target = {0x60007000 as *const <esp32c6::LEDC as core::ops::Deref>::Target}

Pointer to the register block

pub unsafe fn steal() -> LEDC

Unsafely create an instance of this peripheral out of thin air.

Safety

You must ensure that you’re only using one instance of this type at a time.

pub const fn ptr() -> *const <LEDC as Deref>::Target

Return the pointer to the register block

Methods from Deref<Target = RegisterBlock>

pub fn ch_conf0(&self, n: usize) -> &Reg<CH_CONF0_SPEC>

0x00..0x18 - Configuration register 0 for channel %s

pub fn ch_conf0_iter(&self) -> impl Iterator<Item = &Reg<CH_CONF0_SPEC>>

Iterator for array of: 0x00..0x18 - Configuration register 0 for channel %s

pub fn ch0_conf0(&self) -> &Reg<CH_CONF0_SPEC>

0x00 - Configuration register 0 for channel 0

pub fn ch1_conf0(&self) -> &Reg<CH_CONF0_SPEC>

0x14 - Configuration register 0 for channel 1

pub fn ch2_conf0(&self) -> &Reg<CH_CONF0_SPEC>

0x28 - Configuration register 0 for channel 2

pub fn ch3_conf0(&self) -> &Reg<CH_CONF0_SPEC>

0x3c - Configuration register 0 for channel 3

pub fn ch4_conf0(&self) -> &Reg<CH_CONF0_SPEC>

0x50 - Configuration register 0 for channel 4

pub fn ch5_conf0(&self) -> &Reg<CH_CONF0_SPEC>

0x64 - Configuration register 0 for channel 5

pub fn ch_hpoint(&self, n: usize) -> &Reg<CH_HPOINT_SPEC>

0x04..0x1c - High point register for channel %s

pub fn ch_hpoint_iter(&self) -> impl Iterator<Item = &Reg<CH_HPOINT_SPEC>>

Iterator for array of: 0x04..0x1c - High point register for channel %s

pub fn ch0_hpoint(&self) -> &Reg<CH_HPOINT_SPEC>

0x04 - High point register for channel 0

pub fn ch1_hpoint(&self) -> &Reg<CH_HPOINT_SPEC>

0x18 - High point register for channel 1

pub fn ch2_hpoint(&self) -> &Reg<CH_HPOINT_SPEC>

0x2c - High point register for channel 2

pub fn ch3_hpoint(&self) -> &Reg<CH_HPOINT_SPEC>

0x40 - High point register for channel 3

pub fn ch4_hpoint(&self) -> &Reg<CH_HPOINT_SPEC>

0x54 - High point register for channel 4

pub fn ch5_hpoint(&self) -> &Reg<CH_HPOINT_SPEC>

0x68 - High point register for channel 5

pub fn ch_duty(&self, n: usize) -> &Reg<CH_DUTY_SPEC>

0x08..0x20 - Initial duty cycle for channel %s

pub fn ch_duty_iter(&self) -> impl Iterator<Item = &Reg<CH_DUTY_SPEC>>

Iterator for array of: 0x08..0x20 - Initial duty cycle for channel %s

pub fn ch0_duty(&self) -> &Reg<CH_DUTY_SPEC>

0x08 - Initial duty cycle for channel 0

pub fn ch1_duty(&self) -> &Reg<CH_DUTY_SPEC>

0x1c - Initial duty cycle for channel 1

pub fn ch2_duty(&self) -> &Reg<CH_DUTY_SPEC>

0x30 - Initial duty cycle for channel 2

pub fn ch3_duty(&self) -> &Reg<CH_DUTY_SPEC>

0x44 - Initial duty cycle for channel 3

pub fn ch4_duty(&self) -> &Reg<CH_DUTY_SPEC>

0x58 - Initial duty cycle for channel 4

pub fn ch5_duty(&self) -> &Reg<CH_DUTY_SPEC>

0x6c - Initial duty cycle for channel 5

pub fn ch_conf1(&self, n: usize) -> &Reg<CH_CONF1_SPEC>

0x0c..0x24 - Configuration register 1 for channel %s

pub fn ch_conf1_iter(&self) -> impl Iterator<Item = &Reg<CH_CONF1_SPEC>>

Iterator for array of: 0x0c..0x24 - Configuration register 1 for channel %s

pub fn ch0_conf1(&self) -> &Reg<CH_CONF1_SPEC>

0x0c - Configuration register 1 for channel 0

pub fn ch1_conf1(&self) -> &Reg<CH_CONF1_SPEC>

0x20 - Configuration register 1 for channel 1

pub fn ch2_conf1(&self) -> &Reg<CH_CONF1_SPEC>

0x34 - Configuration register 1 for channel 2

pub fn ch3_conf1(&self) -> &Reg<CH_CONF1_SPEC>

0x48 - Configuration register 1 for channel 3

pub fn ch4_conf1(&self) -> &Reg<CH_CONF1_SPEC>

0x5c - Configuration register 1 for channel 4

pub fn ch5_conf1(&self) -> &Reg<CH_CONF1_SPEC>

0x70 - Configuration register 1 for channel 5

pub fn ch_duty_r(&self, n: usize) -> &Reg<CH_DUTY_R_SPEC>

0x10..0x28 - Current duty cycle for channel %s

pub fn ch_duty_r_iter(&self) -> impl Iterator<Item = &Reg<CH_DUTY_R_SPEC>>

Iterator for array of: 0x10..0x28 - Current duty cycle for channel %s

pub fn ch0_duty_r(&self) -> &Reg<CH_DUTY_R_SPEC>

0x10 - Current duty cycle for channel 0

pub fn ch1_duty_r(&self) -> &Reg<CH_DUTY_R_SPEC>

0x24 - Current duty cycle for channel 1

pub fn ch2_duty_r(&self) -> &Reg<CH_DUTY_R_SPEC>

0x38 - Current duty cycle for channel 2

pub fn ch3_duty_r(&self) -> &Reg<CH_DUTY_R_SPEC>

0x4c - Current duty cycle for channel 3

pub fn ch4_duty_r(&self) -> &Reg<CH_DUTY_R_SPEC>

0x60 - Current duty cycle for channel 4

pub fn ch5_duty_r(&self) -> &Reg<CH_DUTY_R_SPEC>

0x74 - Current duty cycle for channel 5

pub fn timer_conf(&self, n: usize) -> &Reg<TIMER_CONF_SPEC>

0xa0..0xb0 - Timer %s configuration

pub fn timer_conf_iter(&self) -> impl Iterator<Item = &Reg<TIMER_CONF_SPEC>>

Iterator for array of: 0xa0..0xb0 - Timer %s configuration

pub fn timer0_conf(&self) -> &Reg<TIMER_CONF_SPEC>

0xa0 - Timer 0 configuration

pub fn timer1_conf(&self) -> &Reg<TIMER_CONF_SPEC>

0xa8 - Timer 1 configuration

pub fn timer2_conf(&self) -> &Reg<TIMER_CONF_SPEC>

0xb0 - Timer 2 configuration

pub fn timer3_conf(&self) -> &Reg<TIMER_CONF_SPEC>

0xb8 - Timer 3 configuration

pub fn timer_value(&self, n: usize) -> &Reg<TIMER_VALUE_SPEC>

0xa4..0xb4 - Timer %s current counter value

pub fn timer_value_iter(&self) -> impl Iterator<Item = &Reg<TIMER_VALUE_SPEC>>

Iterator for array of: 0xa4..0xb4 - Timer %s current counter value

pub fn timer0_value(&self) -> &Reg<TIMER_VALUE_SPEC>

0xa4 - Timer 0 current counter value

pub fn timer1_value(&self) -> &Reg<TIMER_VALUE_SPEC>

0xac - Timer 1 current counter value

pub fn timer2_value(&self) -> &Reg<TIMER_VALUE_SPEC>

0xb4 - Timer 2 current counter value

pub fn timer3_value(&self) -> &Reg<TIMER_VALUE_SPEC>

0xbc - Timer 3 current counter value

pub fn int_raw(&self) -> &Reg<INT_RAW_SPEC>

0xc0 - Raw interrupt status

pub fn int_st(&self) -> &Reg<INT_ST_SPEC>

0xc4 - Masked interrupt status

pub fn int_ena(&self) -> &Reg<INT_ENA_SPEC>

0xc8 - Interrupt enable bits

pub fn int_clr(&self) -> &Reg<INT_CLR_SPEC>

0xcc - Interrupt clear bits

pub fn ch_gamma_wr(&self, n: usize) -> &Reg<CH_GAMMA_WR_SPEC>

0x100..0x118 - Ledc ch%s gamma ram write register.

pub fn ch_gamma_wr_iter(&self) -> impl Iterator<Item = &Reg<CH_GAMMA_WR_SPEC>>

Iterator for array of: 0x100..0x118 - Ledc ch%s gamma ram write register.

pub fn ch0_gamma_wr(&self) -> &Reg<CH_GAMMA_WR_SPEC>

0x100 - Ledc ch0 gamma ram write register.

pub fn ch1_gamma_wr(&self) -> &Reg<CH_GAMMA_WR_SPEC>

0x110 - Ledc ch1 gamma ram write register.

pub fn ch2_gamma_wr(&self) -> &Reg<CH_GAMMA_WR_SPEC>

0x120 - Ledc ch2 gamma ram write register.

pub fn ch3_gamma_wr(&self) -> &Reg<CH_GAMMA_WR_SPEC>

0x130 - Ledc ch3 gamma ram write register.

pub fn ch4_gamma_wr(&self) -> &Reg<CH_GAMMA_WR_SPEC>

0x140 - Ledc ch4 gamma ram write register.

pub fn ch5_gamma_wr(&self) -> &Reg<CH_GAMMA_WR_SPEC>

0x150 - Ledc ch5 gamma ram write register.

pub fn ch_gamma_wr_addr(&self, n: usize) -> &Reg<CH_GAMMA_WR_ADDR_SPEC>

0x104..0x11c - Ledc ch%s gamma ram write address register.

pub fn ch_gamma_wr_addr_iter( &self, ) -> impl Iterator<Item = &Reg<CH_GAMMA_WR_ADDR_SPEC>>

Iterator for array of: 0x104..0x11c - Ledc ch%s gamma ram write address register.

pub fn ch0_gamma_wr_addr(&self) -> &Reg<CH_GAMMA_WR_ADDR_SPEC>

0x104 - Ledc ch0 gamma ram write address register.

pub fn ch1_gamma_wr_addr(&self) -> &Reg<CH_GAMMA_WR_ADDR_SPEC>

0x114 - Ledc ch1 gamma ram write address register.

pub fn ch2_gamma_wr_addr(&self) -> &Reg<CH_GAMMA_WR_ADDR_SPEC>

0x124 - Ledc ch2 gamma ram write address register.

pub fn ch3_gamma_wr_addr(&self) -> &Reg<CH_GAMMA_WR_ADDR_SPEC>

0x134 - Ledc ch3 gamma ram write address register.

pub fn ch4_gamma_wr_addr(&self) -> &Reg<CH_GAMMA_WR_ADDR_SPEC>

0x144 - Ledc ch4 gamma ram write address register.

pub fn ch5_gamma_wr_addr(&self) -> &Reg<CH_GAMMA_WR_ADDR_SPEC>

0x154 - Ledc ch5 gamma ram write address register.

pub fn ch_gamma_rd_addr(&self, n: usize) -> &Reg<CH_GAMMA_RD_ADDR_SPEC>

0x108..0x120 - Ledc ch%s gamma ram read address register.

pub fn ch_gamma_rd_addr_iter( &self, ) -> impl Iterator<Item = &Reg<CH_GAMMA_RD_ADDR_SPEC>>

Iterator for array of: 0x108..0x120 - Ledc ch%s gamma ram read address register.

pub fn ch0_gamma_rd_addr(&self) -> &Reg<CH_GAMMA_RD_ADDR_SPEC>

0x108 - Ledc ch0 gamma ram read address register.

pub fn ch1_gamma_rd_addr(&self) -> &Reg<CH_GAMMA_RD_ADDR_SPEC>

0x118 - Ledc ch1 gamma ram read address register.

pub fn ch2_gamma_rd_addr(&self) -> &Reg<CH_GAMMA_RD_ADDR_SPEC>

0x128 - Ledc ch2 gamma ram read address register.

pub fn ch3_gamma_rd_addr(&self) -> &Reg<CH_GAMMA_RD_ADDR_SPEC>

0x138 - Ledc ch3 gamma ram read address register.

pub fn ch4_gamma_rd_addr(&self) -> &Reg<CH_GAMMA_RD_ADDR_SPEC>

0x148 - Ledc ch4 gamma ram read address register.

pub fn ch5_gamma_rd_addr(&self) -> &Reg<CH_GAMMA_RD_ADDR_SPEC>

0x158 - Ledc ch5 gamma ram read address register.

pub fn ch_gamma_rd_data(&self, n: usize) -> &Reg<CH_GAMMA_RD_DATA_SPEC>

0x10c..0x124 - Ledc ch%s gamma ram read data register.

pub fn ch_gamma_rd_data_iter( &self, ) -> impl Iterator<Item = &Reg<CH_GAMMA_RD_DATA_SPEC>>

Iterator for array of: 0x10c..0x124 - Ledc ch%s gamma ram read data register.

pub fn ch0_gamma_rd_data(&self) -> &Reg<CH_GAMMA_RD_DATA_SPEC>

0x10c - Ledc ch0 gamma ram read data register.

pub fn ch1_gamma_rd_data(&self) -> &Reg<CH_GAMMA_RD_DATA_SPEC>

0x11c - Ledc ch1 gamma ram read data register.

pub fn ch2_gamma_rd_data(&self) -> &Reg<CH_GAMMA_RD_DATA_SPEC>

0x12c - Ledc ch2 gamma ram read data register.

pub fn ch3_gamma_rd_data(&self) -> &Reg<CH_GAMMA_RD_DATA_SPEC>

0x13c - Ledc ch3 gamma ram read data register.

pub fn ch4_gamma_rd_data(&self) -> &Reg<CH_GAMMA_RD_DATA_SPEC>

0x14c - Ledc ch4 gamma ram read data register.

pub fn ch5_gamma_rd_data(&self) -> &Reg<CH_GAMMA_RD_DATA_SPEC>

0x15c - Ledc ch5 gamma ram read data register.

pub fn ch_gamma_conf(&self, n: usize) -> &Reg<CH_GAMMA_CONF_SPEC>

0x180..0x198 - Ledc ch%s gamma config register.

pub fn ch_gamma_conf_iter( &self, ) -> impl Iterator<Item = &Reg<CH_GAMMA_CONF_SPEC>>

Iterator for array of: 0x180..0x198 - Ledc ch%s gamma config register.

pub fn ch0_gamma_conf(&self) -> &Reg<CH_GAMMA_CONF_SPEC>

0x180 - Ledc ch0 gamma config register.

pub fn ch1_gamma_conf(&self) -> &Reg<CH_GAMMA_CONF_SPEC>

0x184 - Ledc ch1 gamma config register.

pub fn ch2_gamma_conf(&self) -> &Reg<CH_GAMMA_CONF_SPEC>

0x188 - Ledc ch2 gamma config register.

pub fn ch3_gamma_conf(&self) -> &Reg<CH_GAMMA_CONF_SPEC>

0x18c - Ledc ch3 gamma config register.

pub fn ch4_gamma_conf(&self) -> &Reg<CH_GAMMA_CONF_SPEC>

0x190 - Ledc ch4 gamma config register.

pub fn ch5_gamma_conf(&self) -> &Reg<CH_GAMMA_CONF_SPEC>

0x194 - Ledc ch5 gamma config register.

pub fn evt_task_en0(&self) -> &Reg<EVT_TASK_EN0_SPEC>

0x1a0 - Ledc event task enable bit register0.

pub fn evt_task_en1(&self) -> &Reg<EVT_TASK_EN1_SPEC>

0x1a4 - Ledc event task enable bit register1.

pub fn evt_task_en2(&self) -> &Reg<EVT_TASK_EN2_SPEC>

0x1a8 - Ledc event task enable bit register2.

pub fn timer_cmp(&self, n: usize) -> &Reg<TIMER_CMP_SPEC>

0x1b0..0x1c0 - Ledc timer%s compare value register.

pub fn timer_cmp_iter(&self) -> impl Iterator<Item = &Reg<TIMER_CMP_SPEC>>

Iterator for array of: 0x1b0..0x1c0 - Ledc timer%s compare value register.

pub fn timer0_cmp(&self) -> &Reg<TIMER_CMP_SPEC>

0x1b0 - Ledc timer0 compare value register.

pub fn timer1_cmp(&self) -> &Reg<TIMER_CMP_SPEC>

0x1b4 - Ledc timer1 compare value register.

pub fn timer2_cmp(&self) -> &Reg<TIMER_CMP_SPEC>

0x1b8 - Ledc timer2 compare value register.

pub fn timer3_cmp(&self) -> &Reg<TIMER_CMP_SPEC>

0x1bc - Ledc timer3 compare value register.

pub fn timer_cnt_cap(&self, n: usize) -> &Reg<TIMER_CNT_CAP_SPEC>

0x1c0..0x1d0 - Ledc timer%s count value capture register.

pub fn timer_cnt_cap_iter( &self, ) -> impl Iterator<Item = &Reg<TIMER_CNT_CAP_SPEC>>

Iterator for array of: 0x1c0..0x1d0 - Ledc timer%s count value capture register.

pub fn timer0_cnt_cap(&self) -> &Reg<TIMER_CNT_CAP_SPEC>

0x1c0 - Ledc timer0 count value capture register.

pub fn timer1_cnt_cap(&self) -> &Reg<TIMER_CNT_CAP_SPEC>

0x1c4 - Ledc timer1 count value capture register.

pub fn timer2_cnt_cap(&self) -> &Reg<TIMER_CNT_CAP_SPEC>

0x1c8 - Ledc timer2 count value capture register.

pub fn timer3_cnt_cap(&self) -> &Reg<TIMER_CNT_CAP_SPEC>

0x1cc - Ledc timer3 count value capture register.

pub fn conf(&self) -> &Reg<CONF_SPEC>

0x1f0 - Global ledc configuration register

pub fn date(&self) -> &Reg<DATE_SPEC>

0x1fc - Version control register

Trait Implementations

impl Debug for LEDC

fn fmt(&self, f: &mut Formatter<'_>) -> Result<(), Error>

Formats the value using the given formatter.

impl Deref for LEDC

type Target = <LEDC as Deref>::Target

The resulting type after dereferencing.

fn deref(&self) -> &<LEDC as Deref>::Target

Dereferences the value.

impl DerefMut for LEDC

fn deref_mut(&mut self) -> &mut <LEDC as Deref>::Target

Mutably dereferences the value.

impl Peripheral for LEDC

type P = LEDC

Peripheral singleton type

unsafe fn clone_unchecked(&mut self) -> <LEDC as Peripheral>::P

Unsafely clone (duplicate) a peripheral singleton.

fn into_ref<'a>(self) -> PeripheralRef<'a, Self::P>

where Self: 'a,

Convert a value into a PeripheralRef.