pub struct UART1 { /* private fields */ }
Implementations§
Source§impl UART1
impl UART1
Sourcepub const PTR: *const <UART1 as Deref>::Target = {0x60001000 as *const <esp32c6::UART1 as core::ops::Deref>::Target}
pub const PTR: *const <UART1 as Deref>::Target = {0x60001000 as *const <esp32c6::UART1 as core::ops::Deref>::Target}
Pointer to the register block
Methods from Deref<Target = RegisterBlock>§
Sourcepub fn int_raw(&self) -> &Reg<INT_RAW_SPEC>
pub fn int_raw(&self) -> &Reg<INT_RAW_SPEC>
0x04 - Raw interrupt status
Sourcepub fn int_st(&self) -> &Reg<INT_ST_SPEC>
pub fn int_st(&self) -> &Reg<INT_ST_SPEC>
0x08 - Masked interrupt status
Sourcepub fn int_ena(&self) -> &Reg<INT_ENA_SPEC>
pub fn int_ena(&self) -> &Reg<INT_ENA_SPEC>
0x0c - Interrupt enable bits
Sourcepub fn int_clr(&self) -> &Reg<INT_CLR_SPEC>
pub fn int_clr(&self) -> &Reg<INT_CLR_SPEC>
0x10 - Interrupt clear bits
Sourcepub fn clkdiv(&self) -> &Reg<CLKDIV_SPEC>
pub fn clkdiv(&self) -> &Reg<CLKDIV_SPEC>
0x14 - Clock divider configuration
Sourcepub fn rx_filt(&self) -> &Reg<RX_FILT_SPEC>
pub fn rx_filt(&self) -> &Reg<RX_FILT_SPEC>
0x18 - Rx Filter configuration
Sourcepub fn status(&self) -> &Reg<STATUS_SPEC>
pub fn status(&self) -> &Reg<STATUS_SPEC>
0x1c - UART status register
Sourcepub fn conf0(&self) -> &Reg<CONF0_SPEC>
pub fn conf0(&self) -> &Reg<CONF0_SPEC>
0x20 - a
Sourcepub fn conf1(&self) -> &Reg<CONF1_SPEC>
pub fn conf1(&self) -> &Reg<CONF1_SPEC>
0x24 - Configuration register 1
Sourcepub fn hwfc_conf(&self) -> &Reg<HWFC_CONF_SPEC>
pub fn hwfc_conf(&self) -> &Reg<HWFC_CONF_SPEC>
0x2c - Hardware flow-control configuration
Sourcepub fn sleep_conf0(&self) -> &Reg<SLEEP_CONF0_SPEC>
pub fn sleep_conf0(&self) -> &Reg<SLEEP_CONF0_SPEC>
0x30 - UART sleep configure register 0
Sourcepub fn sleep_conf1(&self) -> &Reg<SLEEP_CONF1_SPEC>
pub fn sleep_conf1(&self) -> &Reg<SLEEP_CONF1_SPEC>
0x34 - UART sleep configure register 1
Sourcepub fn sleep_conf2(&self) -> &Reg<SLEEP_CONF2_SPEC>
pub fn sleep_conf2(&self) -> &Reg<SLEEP_CONF2_SPEC>
0x38 - UART sleep configure register 2
Sourcepub fn swfc_conf0(&self) -> &Reg<SWFC_CONF0_SPEC>
pub fn swfc_conf0(&self) -> &Reg<SWFC_CONF0_SPEC>
0x3c - Software flow-control character configuration
Sourcepub fn swfc_conf1(&self) -> &Reg<SWFC_CONF1_SPEC>
pub fn swfc_conf1(&self) -> &Reg<SWFC_CONF1_SPEC>
0x40 - Software flow-control character configuration
Sourcepub fn txbrk_conf(&self) -> &Reg<TXBRK_CONF_SPEC>
pub fn txbrk_conf(&self) -> &Reg<TXBRK_CONF_SPEC>
0x44 - Tx Break character configuration
Sourcepub fn idle_conf(&self) -> &Reg<IDLE_CONF_SPEC>
pub fn idle_conf(&self) -> &Reg<IDLE_CONF_SPEC>
0x48 - Frame-end idle configuration
Sourcepub fn rs485_conf(&self) -> &Reg<RS485_CONF_SPEC>
pub fn rs485_conf(&self) -> &Reg<RS485_CONF_SPEC>
0x4c - RS485 mode configuration
Sourcepub fn at_cmd_precnt(&self) -> &Reg<AT_CMD_PRECNT_SPEC>
pub fn at_cmd_precnt(&self) -> &Reg<AT_CMD_PRECNT_SPEC>
0x50 - Pre-sequence timing configuration
Sourcepub fn at_cmd_postcnt(&self) -> &Reg<AT_CMD_POSTCNT_SPEC>
pub fn at_cmd_postcnt(&self) -> &Reg<AT_CMD_POSTCNT_SPEC>
0x54 - Post-sequence timing configuration
Sourcepub fn at_cmd_gaptout(&self) -> &Reg<AT_CMD_GAPTOUT_SPEC>
pub fn at_cmd_gaptout(&self) -> &Reg<AT_CMD_GAPTOUT_SPEC>
0x58 - Timeout configuration
Sourcepub fn at_cmd_char(&self) -> &Reg<AT_CMD_CHAR_SPEC>
pub fn at_cmd_char(&self) -> &Reg<AT_CMD_CHAR_SPEC>
0x5c - AT escape sequence detection configuration
Sourcepub fn mem_conf(&self) -> &Reg<MEM_CONF_SPEC>
pub fn mem_conf(&self) -> &Reg<MEM_CONF_SPEC>
0x60 - UART memory power configuration
Sourcepub fn tout_conf(&self) -> &Reg<TOUT_CONF_SPEC>
pub fn tout_conf(&self) -> &Reg<TOUT_CONF_SPEC>
0x64 - UART threshold and allocation configuration
Sourcepub fn mem_tx_status(&self) -> &Reg<MEM_TX_STATUS_SPEC>
pub fn mem_tx_status(&self) -> &Reg<MEM_TX_STATUS_SPEC>
0x68 - Tx-SRAM write and read offset address.
Sourcepub fn mem_rx_status(&self) -> &Reg<MEM_RX_STATUS_SPEC>
pub fn mem_rx_status(&self) -> &Reg<MEM_RX_STATUS_SPEC>
0x6c - Rx-SRAM write and read offset address.
Sourcepub fn fsm_status(&self) -> &Reg<FSM_STATUS_SPEC>
pub fn fsm_status(&self) -> &Reg<FSM_STATUS_SPEC>
0x70 - UART transmit and receive status.
Sourcepub fn pospulse(&self) -> &Reg<POSPULSE_SPEC>
pub fn pospulse(&self) -> &Reg<POSPULSE_SPEC>
0x74 - Autobaud high pulse register
Sourcepub fn negpulse(&self) -> &Reg<NEGPULSE_SPEC>
pub fn negpulse(&self) -> &Reg<NEGPULSE_SPEC>
0x78 - Autobaud low pulse register
Sourcepub fn lowpulse(&self) -> &Reg<LOWPULSE_SPEC>
pub fn lowpulse(&self) -> &Reg<LOWPULSE_SPEC>
0x7c - Autobaud minimum low pulse duration register
Sourcepub fn highpulse(&self) -> &Reg<HIGHPULSE_SPEC>
pub fn highpulse(&self) -> &Reg<HIGHPULSE_SPEC>
0x80 - Autobaud minimum high pulse duration register
Sourcepub fn rxd_cnt(&self) -> &Reg<RXD_CNT_SPEC>
pub fn rxd_cnt(&self) -> &Reg<RXD_CNT_SPEC>
0x84 - Autobaud edge change count register
Sourcepub fn clk_conf(&self) -> &Reg<CLK_CONF_SPEC>
pub fn clk_conf(&self) -> &Reg<CLK_CONF_SPEC>
0x88 - UART core clock configuration
Sourcepub fn afifo_status(&self) -> &Reg<AFIFO_STATUS_SPEC>
pub fn afifo_status(&self) -> &Reg<AFIFO_STATUS_SPEC>
0x90 - UART AFIFO Status
Sourcepub fn reg_update(&self) -> &Reg<REG_UPDATE_SPEC>
pub fn reg_update(&self) -> &Reg<REG_UPDATE_SPEC>
0x98 - UART Registers Configuration Update register