Struct esp32c6_hal::peripherals::LP_UART
source · pub struct LP_UART { /* private fields */ }
Implementations§
source§impl LP_UART
impl LP_UART
sourcepub unsafe fn steal() -> LP_UART
pub unsafe fn steal() -> LP_UART
Unsafely create an instance of this peripheral out of thin air.
Safety
You must ensure that you’re only using one instance of this type at a time.
Methods from Deref<Target = RegisterBlock>§
pub fn fifo(&self) -> &Reg<FIFO_SPEC>
pub fn fifo(&self) -> &Reg<FIFO_SPEC>
0x00 - FIFO data register
pub fn int_raw(&self) -> &Reg<INT_RAW_SPEC>
pub fn int_raw(&self) -> &Reg<INT_RAW_SPEC>
0x04 - Raw interrupt status
pub fn int_st(&self) -> &Reg<INT_ST_SPEC>
pub fn int_st(&self) -> &Reg<INT_ST_SPEC>
0x08 - Masked interrupt status
pub fn int_ena(&self) -> &Reg<INT_ENA_SPEC>
pub fn int_ena(&self) -> &Reg<INT_ENA_SPEC>
0x0c - Interrupt enable bits
pub fn int_clr(&self) -> &Reg<INT_CLR_SPEC>
pub fn int_clr(&self) -> &Reg<INT_CLR_SPEC>
0x10 - Interrupt clear bits
pub fn clkdiv(&self) -> &Reg<CLKDIV_SPEC>
pub fn clkdiv(&self) -> &Reg<CLKDIV_SPEC>
0x14 - Clock divider configuration
pub fn rx_filt(&self) -> &Reg<RX_FILT_SPEC>
pub fn rx_filt(&self) -> &Reg<RX_FILT_SPEC>
0x18 - Rx Filter configuration
pub fn status(&self) -> &Reg<STATUS_SPEC>
pub fn status(&self) -> &Reg<STATUS_SPEC>
0x1c - UART status register
pub fn conf0(&self) -> &Reg<CONF0_SPEC>
pub fn conf0(&self) -> &Reg<CONF0_SPEC>
0x20 - Configuration register 0
pub fn conf1(&self) -> &Reg<CONF1_SPEC>
pub fn conf1(&self) -> &Reg<CONF1_SPEC>
0x24 - Configuration register 1
pub fn hwfc_conf(&self) -> &Reg<HWFC_CONF_SPEC>
pub fn hwfc_conf(&self) -> &Reg<HWFC_CONF_SPEC>
0x2c - Hardware flow-control configuration
pub fn sleep_conf0(&self) -> &Reg<SLEEP_CONF0_SPEC>
pub fn sleep_conf0(&self) -> &Reg<SLEEP_CONF0_SPEC>
0x30 - UART sleep configure register 0
pub fn sleep_conf1(&self) -> &Reg<SLEEP_CONF1_SPEC>
pub fn sleep_conf1(&self) -> &Reg<SLEEP_CONF1_SPEC>
0x34 - UART sleep configure register 1
pub fn sleep_conf2(&self) -> &Reg<SLEEP_CONF2_SPEC>
pub fn sleep_conf2(&self) -> &Reg<SLEEP_CONF2_SPEC>
0x38 - UART sleep configure register 2
pub fn swfc_conf0(&self) -> &Reg<SWFC_CONF0_SPEC>
pub fn swfc_conf0(&self) -> &Reg<SWFC_CONF0_SPEC>
0x3c - Software flow-control character configuration
pub fn swfc_conf1(&self) -> &Reg<SWFC_CONF1_SPEC>
pub fn swfc_conf1(&self) -> &Reg<SWFC_CONF1_SPEC>
0x40 - Software flow-control character configuration
pub fn txbrk_conf(&self) -> &Reg<TXBRK_CONF_SPEC>
pub fn txbrk_conf(&self) -> &Reg<TXBRK_CONF_SPEC>
0x44 - Tx Break character configuration
pub fn idle_conf(&self) -> &Reg<IDLE_CONF_SPEC>
pub fn idle_conf(&self) -> &Reg<IDLE_CONF_SPEC>
0x48 - Frame-end idle configuration
pub fn rs485_conf(&self) -> &Reg<RS485_CONF_SPEC>
pub fn rs485_conf(&self) -> &Reg<RS485_CONF_SPEC>
0x4c - RS485 mode configuration
pub fn at_cmd_precnt(&self) -> &Reg<AT_CMD_PRECNT_SPEC>
pub fn at_cmd_precnt(&self) -> &Reg<AT_CMD_PRECNT_SPEC>
0x50 - Pre-sequence timing configuration
pub fn at_cmd_postcnt(&self) -> &Reg<AT_CMD_POSTCNT_SPEC>
pub fn at_cmd_postcnt(&self) -> &Reg<AT_CMD_POSTCNT_SPEC>
0x54 - Post-sequence timing configuration
pub fn at_cmd_gaptout(&self) -> &Reg<AT_CMD_GAPTOUT_SPEC>
pub fn at_cmd_gaptout(&self) -> &Reg<AT_CMD_GAPTOUT_SPEC>
0x58 - Timeout configuration
pub fn at_cmd_char(&self) -> &Reg<AT_CMD_CHAR_SPEC>
pub fn at_cmd_char(&self) -> &Reg<AT_CMD_CHAR_SPEC>
0x5c - AT escape sequence detection configuration
pub fn mem_conf(&self) -> &Reg<MEM_CONF_SPEC>
pub fn mem_conf(&self) -> &Reg<MEM_CONF_SPEC>
0x60 - UART memory power configuration
pub fn tout_conf(&self) -> &Reg<TOUT_CONF_SPEC>
pub fn tout_conf(&self) -> &Reg<TOUT_CONF_SPEC>
0x64 - UART threshold and allocation configuration
pub fn mem_tx_status(&self) -> &Reg<MEM_TX_STATUS_SPEC>
pub fn mem_tx_status(&self) -> &Reg<MEM_TX_STATUS_SPEC>
0x68 - Tx-SRAM write and read offset address.
pub fn mem_rx_status(&self) -> &Reg<MEM_RX_STATUS_SPEC>
pub fn mem_rx_status(&self) -> &Reg<MEM_RX_STATUS_SPEC>
0x6c - Rx-SRAM write and read offset address.
pub fn fsm_status(&self) -> &Reg<FSM_STATUS_SPEC>
pub fn fsm_status(&self) -> &Reg<FSM_STATUS_SPEC>
0x70 - UART transmit and receive status.
pub fn clk_conf(&self) -> &Reg<CLK_CONF_SPEC>
pub fn clk_conf(&self) -> &Reg<CLK_CONF_SPEC>
0x88 - UART core clock configuration
pub fn date(&self) -> &Reg<DATE_SPEC>
pub fn date(&self) -> &Reg<DATE_SPEC>
0x8c - UART Version register
pub fn afifo_status(&self) -> &Reg<AFIFO_STATUS_SPEC>
pub fn afifo_status(&self) -> &Reg<AFIFO_STATUS_SPEC>
0x90 - UART AFIFO Status
pub fn reg_update(&self) -> &Reg<REG_UPDATE_SPEC>
pub fn reg_update(&self) -> &Reg<REG_UPDATE_SPEC>
0x98 - UART Registers Configuration Update register
pub fn id(&self) -> &Reg<ID_SPEC>
pub fn id(&self) -> &Reg<ID_SPEC>
0x9c - UART ID register