Struct esp32c6_hal::peripherals::RMT

pub struct RMT { /* private fields */ }

Implementations

impl RMT

pub unsafe fn steal() -> RMT

Unsafely create an instance of this peripheral out of thin air.

Safety

You must ensure that you’re only using one instance of this type at a time.

pub const PTR: *const <RMT as Deref>::Target = {0x60006000 as *const <esp32c6::RMT as core::ops::Deref>::Target}

Pointer to the register block

pub const fn ptr() -> *const <RMT as Deref>::Target

Return the pointer to the register block

Methods from Deref<Target = RegisterBlock>

pub fn chdata(&self, n: usize) -> &Reg<CHDATA_SPEC>

0x00..0x10 - The read and write data register for CHANNEL%s by apb fifo access.

pub fn chdata_iter(&self) -> impl Iterator<Item = &Reg<CHDATA_SPEC>>

Iterator for array of: 0x00..0x10 - The read and write data register for CHANNEL%s by apb fifo access.

pub fn ch0data(&self) -> &Reg<CHDATA_SPEC>

0x00 - The read and write data register for CHANNEL0 by apb fifo access.

pub fn ch1data(&self) -> &Reg<CHDATA_SPEC>

0x04 - The read and write data register for CHANNEL1 by apb fifo access.

pub fn ch2data(&self) -> &Reg<CHDATA_SPEC>

0x08 - The read and write data register for CHANNEL2 by apb fifo access.

pub fn ch3data(&self) -> &Reg<CHDATA_SPEC>

0x0c - The read and write data register for CHANNEL3 by apb fifo access.

pub fn ch_tx_conf0(&self, n: usize) -> &Reg<CH_TX_CONF0_SPEC>

0x10..0x18 - Channel %s configure register 0

pub fn ch_tx_conf0_iter(&self) -> impl Iterator<Item = &Reg<CH_TX_CONF0_SPEC>>

Iterator for array of: 0x10..0x18 - Channel %s configure register 0

pub fn ch0_tx_conf0(&self) -> &Reg<CH_TX_CONF0_SPEC>

0x10 - Channel 0 configure register 0

pub fn ch1_tx_conf0(&self) -> &Reg<CH_TX_CONF0_SPEC>

0x14 - Channel 1 configure register 0

pub fn ch_rx_conf0(&self, n: usize) -> &Reg<CH_RX_CONF0_SPEC>

0x18..0x20 - Channel %s configure register 0

pub fn ch_rx_conf0_iter(&self) -> impl Iterator<Item = &Reg<CH_RX_CONF0_SPEC>>

Iterator for array of: 0x18..0x20 - Channel %s configure register 0

pub fn ch2_rx_conf0(&self) -> &Reg<CH_RX_CONF0_SPEC>

0x18 - Channel 2 configure register 0

pub fn ch3_rx_conf0(&self) -> &Reg<CH_RX_CONF0_SPEC>

0x20 - Channel 3 configure register 0

pub fn ch_rx_conf1(&self, n: usize) -> &Reg<CH_RX_CONF1_SPEC>

0x1c..0x24 - Channel %s configure register 1

pub fn ch_rx_conf1_iter(&self) -> impl Iterator<Item = &Reg<CH_RX_CONF1_SPEC>>

Iterator for array of: 0x1c..0x24 - Channel %s configure register 1

pub fn ch2_rx_conf1(&self) -> &Reg<CH_RX_CONF1_SPEC>

0x1c - Channel 2 configure register 1

pub fn ch3_rx_conf1(&self) -> &Reg<CH_RX_CONF1_SPEC>

0x24 - Channel 3 configure register 1

pub fn ch_tx_status(&self, n: usize) -> &Reg<CH_TX_STATUS_SPEC>

0x28..0x30 - Channel %s status register

pub fn ch_tx_status_iter(&self) -> impl Iterator<Item = &Reg<CH_TX_STATUS_SPEC>>

Iterator for array of: 0x28..0x30 - Channel %s status register

pub fn ch0_tx_status(&self) -> &Reg<CH_TX_STATUS_SPEC>

0x28 - Channel 0 status register

pub fn ch1_tx_status(&self) -> &Reg<CH_TX_STATUS_SPEC>

0x2c - Channel 1 status register

pub fn ch_rx_status(&self, n: usize) -> &Reg<CH_RX_STATUS_SPEC>

0x30..0x38 - Channel %s status register

pub fn ch_rx_status_iter(&self) -> impl Iterator<Item = &Reg<CH_RX_STATUS_SPEC>>

Iterator for array of: 0x30..0x38 - Channel %s status register

pub fn ch0_rx_status(&self) -> &Reg<CH_RX_STATUS_SPEC>

0x30 - Channel 0 status register

pub fn ch1_rx_status(&self) -> &Reg<CH_RX_STATUS_SPEC>

0x34 - Channel 1 status register

pub fn int_raw(&self) -> &Reg<INT_RAW_SPEC>

0x38 - Raw interrupt status

pub fn int_st(&self) -> &Reg<INT_ST_SPEC>

0x3c - Masked interrupt status

pub fn int_ena(&self) -> &Reg<INT_ENA_SPEC>

0x40 - Interrupt enable bits

pub fn int_clr(&self) -> &Reg<INT_CLR_SPEC>

0x44 - Interrupt clear bits

pub fn chcarrier_duty(&self, n: usize) -> &Reg<CHCARRIER_DUTY_SPEC>

0x48..0x50 - Channel %s duty cycle configuration register

pub fn chcarrier_duty_iter( &self ) -> impl Iterator<Item = &Reg<CHCARRIER_DUTY_SPEC>>

Iterator for array of: 0x48..0x50 - Channel %s duty cycle configuration register

pub fn ch0carrier_duty(&self) -> &Reg<CHCARRIER_DUTY_SPEC>

0x48 - Channel 0 duty cycle configuration register

pub fn ch1carrier_duty(&self) -> &Reg<CHCARRIER_DUTY_SPEC>

0x4c - Channel 1 duty cycle configuration register

pub fn ch_rx_carrier_rm(&self, n: usize) -> &Reg<CH_RX_CARRIER_RM_SPEC>

0x50..0x58 - Channel %s carrier remove register

pub fn ch_rx_carrier_rm_iter( &self ) -> impl Iterator<Item = &Reg<CH_RX_CARRIER_RM_SPEC>>

Iterator for array of: 0x50..0x58 - Channel %s carrier remove register

pub fn ch0_rx_carrier_rm(&self) -> &Reg<CH_RX_CARRIER_RM_SPEC>

0x50 - Channel 0 carrier remove register

pub fn ch1_rx_carrier_rm(&self) -> &Reg<CH_RX_CARRIER_RM_SPEC>

0x54 - Channel 1 carrier remove register

pub fn ch_tx_lim(&self, n: usize) -> &Reg<CH_TX_LIM_SPEC>

0x58..0x60 - Channel %s Tx event configuration register

pub fn ch_tx_lim_iter(&self) -> impl Iterator<Item = &Reg<CH_TX_LIM_SPEC>>

Iterator for array of: 0x58..0x60 - Channel %s Tx event configuration register

pub fn ch0_tx_lim(&self) -> &Reg<CH_TX_LIM_SPEC>

0x58 - Channel 0 Tx event configuration register

pub fn ch1_tx_lim(&self) -> &Reg<CH_TX_LIM_SPEC>

0x5c - Channel 1 Tx event configuration register

pub fn ch_rx_lim(&self, n: usize) -> &Reg<CH_RX_LIM_SPEC>

0x60..0x68 - Channel %s Rx event configuration register

pub fn ch_rx_lim_iter(&self) -> impl Iterator<Item = &Reg<CH_RX_LIM_SPEC>>

Iterator for array of: 0x60..0x68 - Channel %s Rx event configuration register

pub fn ch0_rx_lim(&self) -> &Reg<CH_RX_LIM_SPEC>

0x60 - Channel 0 Rx event configuration register

pub fn ch1_rx_lim(&self) -> &Reg<CH_RX_LIM_SPEC>

0x64 - Channel 1 Rx event configuration register

pub fn sys_conf(&self) -> &Reg<SYS_CONF_SPEC>

0x68 - RMT apb configuration register

pub fn tx_sim(&self) -> &Reg<TX_SIM_SPEC>

0x6c - RMT TX synchronous register

pub fn ref_cnt_rst(&self) -> &Reg<REF_CNT_RST_SPEC>

0x70 - RMT clock divider reset register

pub fn date(&self) -> &Reg<DATE_SPEC>

0xcc - RMT version register

Trait Implementations

impl Debug for RMT

fn fmt(&self, f: &mut Formatter<'_>) -> Result<(), Error>

Formats the value using the given formatter.

impl Deref for RMT

type Target = <RMT as Deref>::Target

The resulting type after dereferencing.

fn deref(&self) -> &<RMT as Deref>::Target

Dereferences the value.

impl DerefMut for RMT

fn deref_mut(&mut self) -> &mut <RMT as Deref>::Target

Mutably dereferences the value.

impl Peripheral for RMT

type P = RMT

Peripheral singleton type

unsafe fn clone_unchecked(&mut self) -> <RMT as Peripheral>::P

Unsafely clone (duplicate) a peripheral singleton.

fn into_ref<'a>(self) -> PeripheralRef<'a, Self::P>

where Self: 'a,

Convert a value into a PeripheralRef.