Struct esp32c6_hal::soc::gpio::Pins

source · 
pub struct Pins {
Show 31 fields
    pub gpio0: GpioPin<Unknown, Bank0GpioRegisterAccess, SingleCoreInteruptStatusRegisterAccessBank0, InputOutputAnalogPinType, Gpio0Signals, 0>,
    pub gpio1: GpioPin<Unknown, Bank0GpioRegisterAccess, SingleCoreInteruptStatusRegisterAccessBank0, InputOutputAnalogPinType, Gpio1Signals, 1>,
    pub gpio2: GpioPin<Unknown, Bank0GpioRegisterAccess, SingleCoreInteruptStatusRegisterAccessBank0, InputOutputAnalogPinType, Gpio2Signals, 2>,
    pub gpio3: GpioPin<Unknown, Bank0GpioRegisterAccess, SingleCoreInteruptStatusRegisterAccessBank0, InputOutputAnalogPinType, Gpio3Signals, 3>,
    pub gpio4: GpioPin<Unknown, Bank0GpioRegisterAccess, SingleCoreInteruptStatusRegisterAccessBank0, InputOutputAnalogPinType, Gpio4Signals, 4>,
    pub gpio5: GpioPin<Unknown, Bank0GpioRegisterAccess, SingleCoreInteruptStatusRegisterAccessBank0, InputOutputAnalogPinType, Gpio5Signals, 5>,
    pub gpio6: GpioPin<Unknown, Bank0GpioRegisterAccess, SingleCoreInteruptStatusRegisterAccessBank0, InputOutputAnalogPinType, Gpio6Signals, 6>,
    pub gpio7: GpioPin<Unknown, Bank0GpioRegisterAccess, SingleCoreInteruptStatusRegisterAccessBank0, InputOutputAnalogPinType, Gpio7Signals, 7>,
    pub gpio8: GpioPin<Unknown, Bank0GpioRegisterAccess, SingleCoreInteruptStatusRegisterAccessBank0, InputOutputPinType, Gpio8Signals, 8>,
    pub gpio9: GpioPin<Unknown, Bank0GpioRegisterAccess, SingleCoreInteruptStatusRegisterAccessBank0, InputOutputPinType, Gpio9Signals, 9>,
    pub gpio10: GpioPin<Unknown, Bank0GpioRegisterAccess, SingleCoreInteruptStatusRegisterAccessBank0, InputOutputPinType, Gpio10Signals, 10>,
    pub gpio11: GpioPin<Unknown, Bank0GpioRegisterAccess, SingleCoreInteruptStatusRegisterAccessBank0, InputOutputPinType, Gpio11Signals, 11>,
    pub gpio12: GpioPin<Unknown, Bank0GpioRegisterAccess, SingleCoreInteruptStatusRegisterAccessBank0, InputOutputPinType, Gpio12Signals, 12>,
    pub gpio13: GpioPin<Unknown, Bank0GpioRegisterAccess, SingleCoreInteruptStatusRegisterAccessBank0, InputOutputPinType, Gpio13Signals, 13>,
    pub gpio14: GpioPin<Unknown, Bank0GpioRegisterAccess, SingleCoreInteruptStatusRegisterAccessBank0, InputOutputPinType, Gpio14Signals, 14>,
    pub gpio15: GpioPin<Unknown, Bank0GpioRegisterAccess, SingleCoreInteruptStatusRegisterAccessBank0, InputOutputPinType, Gpio15Signals, 15>,
    pub gpio16: GpioPin<Unknown, Bank0GpioRegisterAccess, SingleCoreInteruptStatusRegisterAccessBank0, InputOutputPinType, Gpio16Signals, 16>,
    pub gpio17: GpioPin<Unknown, Bank0GpioRegisterAccess, SingleCoreInteruptStatusRegisterAccessBank0, InputOutputPinType, Gpio17Signals, 17>,
    pub gpio18: GpioPin<Unknown, Bank0GpioRegisterAccess, SingleCoreInteruptStatusRegisterAccessBank0, InputOutputPinType, Gpio18Signals, 18>,
    pub gpio19: GpioPin<Unknown, Bank0GpioRegisterAccess, SingleCoreInteruptStatusRegisterAccessBank0, InputOutputPinType, Gpio19Signals, 19>,
    pub gpio20: GpioPin<Unknown, Bank0GpioRegisterAccess, SingleCoreInteruptStatusRegisterAccessBank0, InputOutputPinType, Gpio20Signals, 20>,
    pub gpio21: GpioPin<Unknown, Bank0GpioRegisterAccess, SingleCoreInteruptStatusRegisterAccessBank0, InputOutputPinType, Gpio21Signals, 21>,
    pub gpio22: GpioPin<Unknown, Bank0GpioRegisterAccess, SingleCoreInteruptStatusRegisterAccessBank0, InputOutputPinType, Gpio22Signals, 22>,
    pub gpio23: GpioPin<Unknown, Bank0GpioRegisterAccess, SingleCoreInteruptStatusRegisterAccessBank0, InputOutputPinType, Gpio23Signals, 23>,
    pub gpio24: GpioPin<Unknown, Bank0GpioRegisterAccess, SingleCoreInteruptStatusRegisterAccessBank0, InputOutputPinType, Gpio24Signals, 24>,
    pub gpio25: GpioPin<Unknown, Bank0GpioRegisterAccess, SingleCoreInteruptStatusRegisterAccessBank0, InputOutputPinType, Gpio25Signals, 25>,
    pub gpio26: GpioPin<Unknown, Bank0GpioRegisterAccess, SingleCoreInteruptStatusRegisterAccessBank0, InputOutputPinType, Gpio26Signals, 26>,
    pub gpio27: GpioPin<Unknown, Bank0GpioRegisterAccess, SingleCoreInteruptStatusRegisterAccessBank0, InputOutputPinType, Gpio27Signals, 27>,
    pub gpio28: GpioPin<Unknown, Bank0GpioRegisterAccess, SingleCoreInteruptStatusRegisterAccessBank0, InputOutputPinType, Gpio28Signals, 28>,
    pub gpio29: GpioPin<Unknown, Bank0GpioRegisterAccess, SingleCoreInteruptStatusRegisterAccessBank0, InputOutputPinType, Gpio29Signals, 29>,
    pub gpio30: GpioPin<Unknown, Bank0GpioRegisterAccess, SingleCoreInteruptStatusRegisterAccessBank0, InputOutputPinType, Gpio30Signals, 30>,

}

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§gpio0: GpioPin<Unknown, Bank0GpioRegisterAccess, SingleCoreInteruptStatusRegisterAccessBank0, InputOutputAnalogPinType, Gpio0Signals, 0>§gpio1: GpioPin<Unknown, Bank0GpioRegisterAccess, SingleCoreInteruptStatusRegisterAccessBank0, InputOutputAnalogPinType, Gpio1Signals, 1>§gpio2: GpioPin<Unknown, Bank0GpioRegisterAccess, SingleCoreInteruptStatusRegisterAccessBank0, InputOutputAnalogPinType, Gpio2Signals, 2>§gpio3: GpioPin<Unknown, Bank0GpioRegisterAccess, SingleCoreInteruptStatusRegisterAccessBank0, InputOutputAnalogPinType, Gpio3Signals, 3>§gpio4: GpioPin<Unknown, Bank0GpioRegisterAccess, SingleCoreInteruptStatusRegisterAccessBank0, InputOutputAnalogPinType, Gpio4Signals, 4>§gpio5: GpioPin<Unknown, Bank0GpioRegisterAccess, SingleCoreInteruptStatusRegisterAccessBank0, InputOutputAnalogPinType, Gpio5Signals, 5>§gpio6: GpioPin<Unknown, Bank0GpioRegisterAccess, SingleCoreInteruptStatusRegisterAccessBank0, InputOutputAnalogPinType, Gpio6Signals, 6>§gpio7: GpioPin<Unknown, Bank0GpioRegisterAccess, SingleCoreInteruptStatusRegisterAccessBank0, InputOutputAnalogPinType, Gpio7Signals, 7>§gpio8: GpioPin<Unknown, Bank0GpioRegisterAccess, SingleCoreInteruptStatusRegisterAccessBank0, InputOutputPinType, Gpio8Signals, 8>§gpio9: GpioPin<Unknown, Bank0GpioRegisterAccess, SingleCoreInteruptStatusRegisterAccessBank0, InputOutputPinType, Gpio9Signals, 9>§gpio10: GpioPin<Unknown, Bank0GpioRegisterAccess, SingleCoreInteruptStatusRegisterAccessBank0, InputOutputPinType, Gpio10Signals, 10>§gpio11: GpioPin<Unknown, Bank0GpioRegisterAccess, SingleCoreInteruptStatusRegisterAccessBank0, InputOutputPinType, Gpio11Signals, 11>§gpio12: GpioPin<Unknown, Bank0GpioRegisterAccess, SingleCoreInteruptStatusRegisterAccessBank0, InputOutputPinType, Gpio12Signals, 12>§gpio13: GpioPin<Unknown, Bank0GpioRegisterAccess, SingleCoreInteruptStatusRegisterAccessBank0, InputOutputPinType, Gpio13Signals, 13>§gpio14: GpioPin<Unknown, Bank0GpioRegisterAccess, SingleCoreInteruptStatusRegisterAccessBank0, InputOutputPinType, Gpio14Signals, 14>§gpio15: GpioPin<Unknown, Bank0GpioRegisterAccess, SingleCoreInteruptStatusRegisterAccessBank0, InputOutputPinType, Gpio15Signals, 15>§gpio16: GpioPin<Unknown, Bank0GpioRegisterAccess, SingleCoreInteruptStatusRegisterAccessBank0, InputOutputPinType, Gpio16Signals, 16>§gpio17: GpioPin<Unknown, Bank0GpioRegisterAccess, SingleCoreInteruptStatusRegisterAccessBank0, InputOutputPinType, Gpio17Signals, 17>§gpio18: GpioPin<Unknown, Bank0GpioRegisterAccess, SingleCoreInteruptStatusRegisterAccessBank0, InputOutputPinType, Gpio18Signals, 18>§gpio19: GpioPin<Unknown, Bank0GpioRegisterAccess, SingleCoreInteruptStatusRegisterAccessBank0, InputOutputPinType, Gpio19Signals, 19>§gpio20: GpioPin<Unknown, Bank0GpioRegisterAccess, SingleCoreInteruptStatusRegisterAccessBank0, InputOutputPinType, Gpio20Signals, 20>§gpio21: GpioPin<Unknown, Bank0GpioRegisterAccess, SingleCoreInteruptStatusRegisterAccessBank0, InputOutputPinType, Gpio21Signals, 21>§gpio22: GpioPin<Unknown, Bank0GpioRegisterAccess, SingleCoreInteruptStatusRegisterAccessBank0, InputOutputPinType, Gpio22Signals, 22>§gpio23: GpioPin<Unknown, Bank0GpioRegisterAccess, SingleCoreInteruptStatusRegisterAccessBank0, InputOutputPinType, Gpio23Signals, 23>§gpio24: GpioPin<Unknown, Bank0GpioRegisterAccess, SingleCoreInteruptStatusRegisterAccessBank0, InputOutputPinType, Gpio24Signals, 24>§gpio25: GpioPin<Unknown, Bank0GpioRegisterAccess, SingleCoreInteruptStatusRegisterAccessBank0, InputOutputPinType, Gpio25Signals, 25>§gpio26: GpioPin<Unknown, Bank0GpioRegisterAccess, SingleCoreInteruptStatusRegisterAccessBank0, InputOutputPinType, Gpio26Signals, 26>§gpio27: GpioPin<Unknown, Bank0GpioRegisterAccess, SingleCoreInteruptStatusRegisterAccessBank0, InputOutputPinType, Gpio27Signals, 27>§gpio28: GpioPin<Unknown, Bank0GpioRegisterAccess, SingleCoreInteruptStatusRegisterAccessBank0, InputOutputPinType, Gpio28Signals, 28>§gpio29: GpioPin<Unknown, Bank0GpioRegisterAccess, SingleCoreInteruptStatusRegisterAccessBank0, InputOutputPinType, Gpio29Signals, 29>§gpio30: GpioPin<Unknown, Bank0GpioRegisterAccess, SingleCoreInteruptStatusRegisterAccessBank0, InputOutputPinType, Gpio30Signals, 30>

Auto Trait Implementations§

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impl RefUnwindSafe for Pins

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impl Send for Pins

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impl Sync for Pins

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impl Unpin for Pins

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impl UnwindSafe for Pins

Blanket Implementations§

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impl<T> Any for Twhere T: 'static + ?Sized,

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fn type_id(&self) -> TypeId

Gets the TypeId of self. Read more
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fn borrow(&self) -> &T

Immutably borrows from an owned value. Read more
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impl<T> BorrowMut<T> for Twhere T: ?Sized,

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fn borrow_mut(&mut self) -> &mut T

Mutably borrows from an owned value. Read more
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impl<T> From<T> for T

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fn from(t: T) -> T

Returns the argument unchanged.

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impl<T, U> Into<U> for Twhere U: From<T>,

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fn into(self) -> U

Calls U::from(self).

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impl<T, U> TryFrom<U> for Twhere U: Into<T>,

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type Error = Infallible

The type returned in the event of a conversion error.
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fn try_from(value: U) -> Result<T, <T as TryFrom<U>>::Error>

Performs the conversion.
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impl<T, U> TryInto<U> for Twhere U: TryFrom<T>,

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type Error = <U as TryFrom<T>>::Error

The type returned in the event of a conversion error.
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fn try_into(self) -> Result<U, <U as TryFrom<T>>::Error>

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