Type Alias esp32c3::sensitive::core_x_iram0_pms_constrain_2::W
source · pub type W = W<CORE_X_IRAM0_PMS_CONSTRAIN_2_SPEC>;
Expand description
Register CORE_X_IRAM0_PMS_CONSTRAIN_2
writer
Aliased Type§
struct W { /* private fields */ }
Implementations§
source§impl W
impl W
sourcepub fn core_x_iram0_pms_constrain_sram_world_0_pms_0(
&mut self
) -> CORE_X_IRAM0_PMS_CONSTRAIN_SRAM_WORLD_0_PMS_0_W<'_, CORE_X_IRAM0_PMS_CONSTRAIN_2_SPEC>
pub fn core_x_iram0_pms_constrain_sram_world_0_pms_0( &mut self ) -> CORE_X_IRAM0_PMS_CONSTRAIN_SRAM_WORLD_0_PMS_0_W<'_, CORE_X_IRAM0_PMS_CONSTRAIN_2_SPEC>
Bits 0:2 - core_x_iram0_pms_constrain_sram_world_0_pms_0
sourcepub fn core_x_iram0_pms_constrain_sram_world_0_pms_1(
&mut self
) -> CORE_X_IRAM0_PMS_CONSTRAIN_SRAM_WORLD_0_PMS_1_W<'_, CORE_X_IRAM0_PMS_CONSTRAIN_2_SPEC>
pub fn core_x_iram0_pms_constrain_sram_world_0_pms_1( &mut self ) -> CORE_X_IRAM0_PMS_CONSTRAIN_SRAM_WORLD_0_PMS_1_W<'_, CORE_X_IRAM0_PMS_CONSTRAIN_2_SPEC>
Bits 3:5 - core_x_iram0_pms_constrain_sram_world_0_pms_1
sourcepub fn core_x_iram0_pms_constrain_sram_world_0_pms_2(
&mut self
) -> CORE_X_IRAM0_PMS_CONSTRAIN_SRAM_WORLD_0_PMS_2_W<'_, CORE_X_IRAM0_PMS_CONSTRAIN_2_SPEC>
pub fn core_x_iram0_pms_constrain_sram_world_0_pms_2( &mut self ) -> CORE_X_IRAM0_PMS_CONSTRAIN_SRAM_WORLD_0_PMS_2_W<'_, CORE_X_IRAM0_PMS_CONSTRAIN_2_SPEC>
Bits 6:8 - core_x_iram0_pms_constrain_sram_world_0_pms_2
sourcepub fn core_x_iram0_pms_constrain_sram_world_0_pms_3(
&mut self
) -> CORE_X_IRAM0_PMS_CONSTRAIN_SRAM_WORLD_0_PMS_3_W<'_, CORE_X_IRAM0_PMS_CONSTRAIN_2_SPEC>
pub fn core_x_iram0_pms_constrain_sram_world_0_pms_3( &mut self ) -> CORE_X_IRAM0_PMS_CONSTRAIN_SRAM_WORLD_0_PMS_3_W<'_, CORE_X_IRAM0_PMS_CONSTRAIN_2_SPEC>
Bits 9:11 - core_x_iram0_pms_constrain_sram_world_0_pms_3
sourcepub fn core_x_iram0_pms_constrain_sram_world_0_cachedataarray_pms_0(
&mut self
) -> CORE_X_IRAM0_PMS_CONSTRAIN_SRAM_WORLD_0_CACHEDATAARRAY_PMS_0_W<'_, CORE_X_IRAM0_PMS_CONSTRAIN_2_SPEC>
pub fn core_x_iram0_pms_constrain_sram_world_0_cachedataarray_pms_0( &mut self ) -> CORE_X_IRAM0_PMS_CONSTRAIN_SRAM_WORLD_0_CACHEDATAARRAY_PMS_0_W<'_, CORE_X_IRAM0_PMS_CONSTRAIN_2_SPEC>
Bits 12:14 - core_x_iram0_pms_constrain_sram_world_0_cachedataarray_pms_0
sourcepub fn core_x_iram0_pms_constrain_rom_world_0_pms(
&mut self
) -> CORE_X_IRAM0_PMS_CONSTRAIN_ROM_WORLD_0_PMS_W<'_, CORE_X_IRAM0_PMS_CONSTRAIN_2_SPEC>
pub fn core_x_iram0_pms_constrain_rom_world_0_pms( &mut self ) -> CORE_X_IRAM0_PMS_CONSTRAIN_ROM_WORLD_0_PMS_W<'_, CORE_X_IRAM0_PMS_CONSTRAIN_2_SPEC>
Bits 18:20 - core_x_iram0_pms_constrain_rom_world_0_pms