Expand description
SENSITIVE Peripheral
Modules§
- SENSITIVE_APB_PERIPHERAL_ACCESS_0_REG
- SENSITIVE_APB_PERIPHERAL_ACCESS_1_REG
- SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_0_REG
- SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_1_REG
- SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_2_REG
- SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_3_REG
- SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_4_REG
- SENSITIVE_BACKUP_BUS_PMS_MONITOR_0_REG
- SENSITIVE_BACKUP_BUS_PMS_MONITOR_1_REG
- SENSITIVE_BACKUP_BUS_PMS_MONITOR_2_REG
- SENSITIVE_BACKUP_BUS_PMS_MONITOR_3_REG
- SENSITIVE_CACHE_MMU_ACCESS_0_REG
- SENSITIVE_CACHE_MMU_ACCESS_1_REG
- SENSITIVE_CACHE_TAG_ACCESS_0_REG
- SENSITIVE_CACHE_TAG_ACCESS_1_REG
- SENSITIVE_CLOCK_GATE_REG_REG
- SENSITIVE_CORE_0_DRAM0_PMS_MONITOR_0_REG
- SENSITIVE_CORE_0_DRAM0_PMS_MONITOR_1_REG
- SENSITIVE_CORE_0_DRAM0_PMS_MONITOR_2_REG
- SENSITIVE_CORE_0_DRAM0_PMS_MONITOR_3_REG
- SENSITIVE_CORE_0_IRAM0_PMS_MONITOR_0_REG
- SENSITIVE_CORE_0_IRAM0_PMS_MONITOR_1_REG
- SENSITIVE_CORE_0_IRAM0_PMS_MONITOR_2_REG
- SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_0_REG
- SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_1_REG
- SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_2_REG
- SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_3_REG
- SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_4_REG
- SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_5_REG
- SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_6_REG
- SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_7_REG
- SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_8_REG
- SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_9_REG
- SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_10_REG
- SENSITIVE_CORE_0_PIF_PMS_MONITOR_0_REG
- SENSITIVE_CORE_0_PIF_PMS_MONITOR_1_REG
- SENSITIVE_CORE_0_PIF_PMS_MONITOR_2_REG
- SENSITIVE_CORE_0_PIF_PMS_MONITOR_3_REG
- SENSITIVE_CORE_0_PIF_PMS_MONITOR_4_REG
- SENSITIVE_CORE_0_PIF_PMS_MONITOR_5_REG
- SENSITIVE_CORE_0_PIF_PMS_MONITOR_6_REG
- SENSITIVE_CORE_X_DRAM0_PMS_CONSTRAIN_0_REG
- SENSITIVE_CORE_X_DRAM0_PMS_CONSTRAIN_1_REG
- SENSITIVE_CORE_X_IRAM0_DRAM0_DMA_SPLIT_LINE_CONSTRAIN_0_REG
- SENSITIVE_CORE_X_IRAM0_DRAM0_DMA_SPLIT_LINE_CONSTRAIN_1_REG
- SENSITIVE_CORE_X_IRAM0_DRAM0_DMA_SPLIT_LINE_CONSTRAIN_2_REG
- SENSITIVE_CORE_X_IRAM0_DRAM0_DMA_SPLIT_LINE_CONSTRAIN_3_REG
- SENSITIVE_CORE_X_IRAM0_DRAM0_DMA_SPLIT_LINE_CONSTRAIN_4_REG
- SENSITIVE_CORE_X_IRAM0_DRAM0_DMA_SPLIT_LINE_CONSTRAIN_5_REG
- SENSITIVE_CORE_X_IRAM0_PMS_CONSTRAIN_0_REG
- SENSITIVE_CORE_X_IRAM0_PMS_CONSTRAIN_1_REG
- SENSITIVE_CORE_X_IRAM0_PMS_CONSTRAIN_2_REG
- SENSITIVE_DATE_REG
- SENSITIVE_DMA_APBPERI_ADC_DAC_PMS_CONSTRAIN_0_REG
- SENSITIVE_DMA_APBPERI_ADC_DAC_PMS_CONSTRAIN_1_REG
- SENSITIVE_DMA_APBPERI_AES_PMS_CONSTRAIN_0_REG
- SENSITIVE_DMA_APBPERI_AES_PMS_CONSTRAIN_1_REG
- SENSITIVE_DMA_APBPERI_BACKUP_PMS_CONSTRAIN_0_REG
- SENSITIVE_DMA_APBPERI_BACKUP_PMS_CONSTRAIN_1_REG
- SENSITIVE_DMA_APBPERI_I2S0_PMS_CONSTRAIN_0_REG
- SENSITIVE_DMA_APBPERI_I2S0_PMS_CONSTRAIN_1_REG
- SENSITIVE_DMA_APBPERI_LC_PMS_CONSTRAIN_0_REG
- SENSITIVE_DMA_APBPERI_LC_PMS_CONSTRAIN_1_REG
- SENSITIVE_DMA_APBPERI_MAC_PMS_CONSTRAIN_0_REG
- SENSITIVE_DMA_APBPERI_MAC_PMS_CONSTRAIN_1_REG
- SENSITIVE_DMA_APBPERI_PMS_MONITOR_0_REG
- SENSITIVE_DMA_APBPERI_PMS_MONITOR_1_REG
- SENSITIVE_DMA_APBPERI_PMS_MONITOR_2_REG
- SENSITIVE_DMA_APBPERI_PMS_MONITOR_3_REG
- SENSITIVE_DMA_APBPERI_SHA_PMS_CONSTRAIN_0_REG
- SENSITIVE_DMA_APBPERI_SHA_PMS_CONSTRAIN_1_REG
- SENSITIVE_DMA_APBPERI_SPI2_PMS_CONSTRAIN_0_REG
- SENSITIVE_DMA_APBPERI_SPI2_PMS_CONSTRAIN_1_REG
- SENSITIVE_DMA_APBPERI_UCHI0_PMS_CONSTRAIN_0_REG
- SENSITIVE_DMA_APBPERI_UCHI0_PMS_CONSTRAIN_1_REG
- SENSITIVE_INTERNAL_SRAM_USAGE_0_REG
- SENSITIVE_INTERNAL_SRAM_USAGE_1_REG
- SENSITIVE_INTERNAL_SRAM_USAGE_3_REG
- SENSITIVE_INTERNAL_SRAM_USAGE_4_REG
- SENSITIVE_PRIVILEGE_MODE_SEL_REG
- SENSITIVE_PRIVILEGE_MODE_SEL_LOCK_REG
- SENSITIVE_REGION_PMS_CONSTRAIN_0_REG
- SENSITIVE_REGION_PMS_CONSTRAIN_1_REG
- SENSITIVE_REGION_PMS_CONSTRAIN_2_REG
- SENSITIVE_REGION_PMS_CONSTRAIN_3_REG
- SENSITIVE_REGION_PMS_CONSTRAIN_4_REG
- SENSITIVE_REGION_PMS_CONSTRAIN_5_REG
- SENSITIVE_REGION_PMS_CONSTRAIN_6_REG
- SENSITIVE_REGION_PMS_CONSTRAIN_7_REG
- SENSITIVE_REGION_PMS_CONSTRAIN_8_REG
- SENSITIVE_REGION_PMS_CONSTRAIN_9_REG
- SENSITIVE_REGION_PMS_CONSTRAIN_10_REG
- SENSITIVE_ROM_TABLE_REG
- SENSITIVE_ROM_TABLE_LOCK_REG
Structs§
- Register block
Type Aliases§
- APB_PERIPHERAL_ACCESS_0 (rw) register accessor: SENSITIVE_APB_PERIPHERAL_ACCESS_0_REG
- APB_PERIPHERAL_ACCESS_1 (rw) register accessor: SENSITIVE_APB_PERIPHERAL_ACCESS_1_REG
- BACKUP_BUS_PMS_CONSTRAIN_0 (rw) register accessor: SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_0_REG
- BACKUP_BUS_PMS_CONSTRAIN_1 (rw) register accessor: SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_1_REG
- BACKUP_BUS_PMS_CONSTRAIN_2 (rw) register accessor: SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_2_REG
- BACKUP_BUS_PMS_CONSTRAIN_3 (rw) register accessor: SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_3_REG
- BACKUP_BUS_PMS_CONSTRAIN_4 (rw) register accessor: SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_4_REG
- BACKUP_BUS_PMS_MONITOR_0 (rw) register accessor: SENSITIVE_BACKUP_BUS_PMS_MONITOR_0_REG
- BACKUP_BUS_PMS_MONITOR_1 (rw) register accessor: SENSITIVE_BACKUP_BUS_PMS_MONITOR_1_REG
- BACKUP_BUS_PMS_MONITOR_2 (r) register accessor: SENSITIVE_BACKUP_BUS_PMS_MONITOR_2_REG
- BACKUP_BUS_PMS_MONITOR_3 (r) register accessor: SENSITIVE_BACKUP_BUS_PMS_MONITOR_3_REG
- CACHE_MMU_ACCESS_0 (rw) register accessor: SENSITIVE_CACHE_MMU_ACCESS_0_REG
- CACHE_MMU_ACCESS_1 (rw) register accessor: SENSITIVE_CACHE_MMU_ACCESS_1_REG
- CACHE_TAG_ACCESS_0 (rw) register accessor: SENSITIVE_CACHE_TAG_ACCESS_0_REG
- CACHE_TAG_ACCESS_1 (rw) register accessor: SENSITIVE_CACHE_TAG_ACCESS_1_REG
- CLOCK_GATE (rw) register accessor: SENSITIVE_CLOCK_GATE_REG_REG
- CORE_0_DRAM0_PMS_MONITOR_0 (rw) register accessor: SENSITIVE_CORE_0_DRAM0_PMS_MONITOR_0_REG
- CORE_0_DRAM0_PMS_MONITOR_1 (rw) register accessor: SENSITIVE_CORE_0_DRAM0_PMS_MONITOR_1_REG
- CORE_0_DRAM0_PMS_MONITOR_2 (r) register accessor: SENSITIVE_CORE_0_DRAM0_PMS_MONITOR_2_REG
- CORE_0_DRAM0_PMS_MONITOR_3 (r) register accessor: SENSITIVE_CORE_0_DRAM0_PMS_MONITOR_3_REG
- CORE_0_IRAM0_PMS_MONITOR_0 (rw) register accessor: SENSITIVE_CORE_0_IRAM0_PMS_MONITOR_0_REG
- CORE_0_IRAM0_PMS_MONITOR_1 (rw) register accessor: SENSITIVE_CORE_0_IRAM0_PMS_MONITOR_1_REG
- CORE_0_IRAM0_PMS_MONITOR_2 (r) register accessor: SENSITIVE_CORE_0_IRAM0_PMS_MONITOR_2_REG
- CORE_0_PIF_PMS_CONSTRAIN_0 (rw) register accessor: SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_0_REG
- CORE_0_PIF_PMS_CONSTRAIN_1 (rw) register accessor: SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_1_REG
- CORE_0_PIF_PMS_CONSTRAIN_2 (rw) register accessor: SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_2_REG
- CORE_0_PIF_PMS_CONSTRAIN_3 (rw) register accessor: SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_3_REG
- CORE_0_PIF_PMS_CONSTRAIN_4 (rw) register accessor: SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_4_REG
- CORE_0_PIF_PMS_CONSTRAIN_5 (rw) register accessor: SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_5_REG
- CORE_0_PIF_PMS_CONSTRAIN_6 (rw) register accessor: SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_6_REG
- CORE_0_PIF_PMS_CONSTRAIN_7 (rw) register accessor: SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_7_REG
- CORE_0_PIF_PMS_CONSTRAIN_8 (rw) register accessor: SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_8_REG
- CORE_0_PIF_PMS_CONSTRAIN_9 (rw) register accessor: SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_9_REG
- CORE_0_PIF_PMS_CONSTRAIN_10 (rw) register accessor: SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_10_REG
- CORE_0_PIF_PMS_MONITOR_0 (rw) register accessor: SENSITIVE_CORE_0_PIF_PMS_MONITOR_0_REG
- CORE_0_PIF_PMS_MONITOR_1 (rw) register accessor: SENSITIVE_CORE_0_PIF_PMS_MONITOR_1_REG
- CORE_0_PIF_PMS_MONITOR_2 (r) register accessor: SENSITIVE_CORE_0_PIF_PMS_MONITOR_2_REG
- CORE_0_PIF_PMS_MONITOR_3 (r) register accessor: SENSITIVE_CORE_0_PIF_PMS_MONITOR_3_REG
- CORE_0_PIF_PMS_MONITOR_4 (rw) register accessor: SENSITIVE_CORE_0_PIF_PMS_MONITOR_4_REG
- CORE_0_PIF_PMS_MONITOR_5 (r) register accessor: SENSITIVE_CORE_0_PIF_PMS_MONITOR_5_REG
- CORE_0_PIF_PMS_MONITOR_6 (r) register accessor: SENSITIVE_CORE_0_PIF_PMS_MONITOR_6_REG
- CORE_X_DRAM0_PMS_CONSTRAIN_0 (rw) register accessor: SENSITIVE_CORE_X_DRAM0_PMS_CONSTRAIN_0_REG
- CORE_X_DRAM0_PMS_CONSTRAIN_1 (rw) register accessor: SENSITIVE_CORE_X_DRAM0_PMS_CONSTRAIN_1_REG
- CORE_X_IRAM0_DRAM0_DMA_SPLIT_LINE_CONSTRAIN_0 (rw) register accessor: SENSITIVE_CORE_X_IRAM0_DRAM0_DMA_SPLIT_LINE_CONSTRAIN_0_REG
- CORE_X_IRAM0_DRAM0_DMA_SPLIT_LINE_CONSTRAIN_1 (rw) register accessor: SENSITIVE_CORE_X_IRAM0_DRAM0_DMA_SPLIT_LINE_CONSTRAIN_1_REG
- CORE_X_IRAM0_DRAM0_DMA_SPLIT_LINE_CONSTRAIN_2 (rw) register accessor: SENSITIVE_CORE_X_IRAM0_DRAM0_DMA_SPLIT_LINE_CONSTRAIN_2_REG
- CORE_X_IRAM0_DRAM0_DMA_SPLIT_LINE_CONSTRAIN_3 (rw) register accessor: SENSITIVE_CORE_X_IRAM0_DRAM0_DMA_SPLIT_LINE_CONSTRAIN_3_REG
- CORE_X_IRAM0_DRAM0_DMA_SPLIT_LINE_CONSTRAIN_4 (rw) register accessor: SENSITIVE_CORE_X_IRAM0_DRAM0_DMA_SPLIT_LINE_CONSTRAIN_4_REG
- CORE_X_IRAM0_DRAM0_DMA_SPLIT_LINE_CONSTRAIN_5 (rw) register accessor: SENSITIVE_CORE_X_IRAM0_DRAM0_DMA_SPLIT_LINE_CONSTRAIN_5_REG
- CORE_X_IRAM0_PMS_CONSTRAIN_0 (rw) register accessor: SENSITIVE_CORE_X_IRAM0_PMS_CONSTRAIN_0_REG
- CORE_X_IRAM0_PMS_CONSTRAIN_1 (rw) register accessor: SENSITIVE_CORE_X_IRAM0_PMS_CONSTRAIN_1_REG
- CORE_X_IRAM0_PMS_CONSTRAIN_2 (rw) register accessor: SENSITIVE_CORE_X_IRAM0_PMS_CONSTRAIN_2_REG
- DATE (rw) register accessor: SENSITIVE_DATE_REG
- DMA_APBPERI_ADC_DAC_PMS_CONSTRAIN_0 (rw) register accessor: SENSITIVE_DMA_APBPERI_ADC_DAC_PMS_CONSTRAIN_0_REG
- DMA_APBPERI_ADC_DAC_PMS_CONSTRAIN_1 (rw) register accessor: SENSITIVE_DMA_APBPERI_ADC_DAC_PMS_CONSTRAIN_1_REG
- DMA_APBPERI_AES_PMS_CONSTRAIN_0 (rw) register accessor: SENSITIVE_DMA_APBPERI_AES_PMS_CONSTRAIN_0_REG
- DMA_APBPERI_AES_PMS_CONSTRAIN_1 (rw) register accessor: SENSITIVE_DMA_APBPERI_AES_PMS_CONSTRAIN_1_REG
- DMA_APBPERI_BACKUP_PMS_CONSTRAIN_0 (rw) register accessor: SENSITIVE_DMA_APBPERI_BACKUP_PMS_CONSTRAIN_0_REG
- DMA_APBPERI_BACKUP_PMS_CONSTRAIN_1 (rw) register accessor: SENSITIVE_DMA_APBPERI_BACKUP_PMS_CONSTRAIN_1_REG
- DMA_APBPERI_I2S0_PMS_CONSTRAIN_0 (rw) register accessor: SENSITIVE_DMA_APBPERI_I2S0_PMS_CONSTRAIN_0_REG
- DMA_APBPERI_I2S0_PMS_CONSTRAIN_1 (rw) register accessor: SENSITIVE_DMA_APBPERI_I2S0_PMS_CONSTRAIN_1_REG
- DMA_APBPERI_LC_PMS_CONSTRAIN_0 (rw) register accessor: SENSITIVE_DMA_APBPERI_LC_PMS_CONSTRAIN_0_REG
- DMA_APBPERI_LC_PMS_CONSTRAIN_1 (rw) register accessor: SENSITIVE_DMA_APBPERI_LC_PMS_CONSTRAIN_1_REG
- DMA_APBPERI_MAC_PMS_CONSTRAIN_0 (rw) register accessor: SENSITIVE_DMA_APBPERI_MAC_PMS_CONSTRAIN_0_REG
- DMA_APBPERI_MAC_PMS_CONSTRAIN_1 (rw) register accessor: SENSITIVE_DMA_APBPERI_MAC_PMS_CONSTRAIN_1_REG
- DMA_APBPERI_PMS_MONITOR_0 (rw) register accessor: SENSITIVE_DMA_APBPERI_PMS_MONITOR_0_REG
- DMA_APBPERI_PMS_MONITOR_1 (rw) register accessor: SENSITIVE_DMA_APBPERI_PMS_MONITOR_1_REG
- DMA_APBPERI_PMS_MONITOR_2 (r) register accessor: SENSITIVE_DMA_APBPERI_PMS_MONITOR_2_REG
- DMA_APBPERI_PMS_MONITOR_3 (r) register accessor: SENSITIVE_DMA_APBPERI_PMS_MONITOR_3_REG
- DMA_APBPERI_SHA_PMS_CONSTRAIN_0 (rw) register accessor: SENSITIVE_DMA_APBPERI_SHA_PMS_CONSTRAIN_0_REG
- DMA_APBPERI_SHA_PMS_CONSTRAIN_1 (rw) register accessor: SENSITIVE_DMA_APBPERI_SHA_PMS_CONSTRAIN_1_REG
- DMA_APBPERI_SPI2_PMS_CONSTRAIN_0 (rw) register accessor: SENSITIVE_DMA_APBPERI_SPI2_PMS_CONSTRAIN_0_REG
- DMA_APBPERI_SPI2_PMS_CONSTRAIN_1 (rw) register accessor: SENSITIVE_DMA_APBPERI_SPI2_PMS_CONSTRAIN_1_REG
- DMA_APBPERI_UCHI0_PMS_CONSTRAIN_0 (rw) register accessor: SENSITIVE_DMA_APBPERI_UCHI0_PMS_CONSTRAIN_0_REG
- DMA_APBPERI_UCHI0_PMS_CONSTRAIN_1 (rw) register accessor: SENSITIVE_DMA_APBPERI_UCHI0_PMS_CONSTRAIN_1_REG
- INTERNAL_SRAM_USAGE_0 (rw) register accessor: SENSITIVE_INTERNAL_SRAM_USAGE_0_REG
- INTERNAL_SRAM_USAGE_1 (rw) register accessor: SENSITIVE_INTERNAL_SRAM_USAGE_1_REG
- INTERNAL_SRAM_USAGE_3 (rw) register accessor: SENSITIVE_INTERNAL_SRAM_USAGE_3_REG
- INTERNAL_SRAM_USAGE_4 (rw) register accessor: SENSITIVE_INTERNAL_SRAM_USAGE_4_REG
- PRIVILEGE_MODE_SEL (rw) register accessor: SENSITIVE_PRIVILEGE_MODE_SEL_REG
- PRIVILEGE_MODE_SEL_LOCK (rw) register accessor: SENSITIVE_PRIVILEGE_MODE_SEL_LOCK_REG
- REGION_PMS_CONSTRAIN_0 (rw) register accessor: SENSITIVE_REGION_PMS_CONSTRAIN_0_REG
- REGION_PMS_CONSTRAIN_1 (rw) register accessor: SENSITIVE_REGION_PMS_CONSTRAIN_1_REG
- REGION_PMS_CONSTRAIN_2 (rw) register accessor: SENSITIVE_REGION_PMS_CONSTRAIN_2_REG
- REGION_PMS_CONSTRAIN_3 (rw) register accessor: SENSITIVE_REGION_PMS_CONSTRAIN_3_REG
- REGION_PMS_CONSTRAIN_4 (rw) register accessor: SENSITIVE_REGION_PMS_CONSTRAIN_4_REG
- REGION_PMS_CONSTRAIN_5 (rw) register accessor: SENSITIVE_REGION_PMS_CONSTRAIN_5_REG
- REGION_PMS_CONSTRAIN_6 (rw) register accessor: SENSITIVE_REGION_PMS_CONSTRAIN_6_REG
- REGION_PMS_CONSTRAIN_7 (rw) register accessor: SENSITIVE_REGION_PMS_CONSTRAIN_7_REG
- REGION_PMS_CONSTRAIN_8 (rw) register accessor: SENSITIVE_REGION_PMS_CONSTRAIN_8_REG
- REGION_PMS_CONSTRAIN_9 (rw) register accessor: SENSITIVE_REGION_PMS_CONSTRAIN_9_REG
- REGION_PMS_CONSTRAIN_10 (rw) register accessor: SENSITIVE_REGION_PMS_CONSTRAIN_10_REG
- ROM_TABLE (rw) register accessor: SENSITIVE_ROM_TABLE_REG
- ROM_TABLE_LOCK (rw) register accessor: SENSITIVE_ROM_TABLE_LOCK_REG