Type Alias esp32c3::sensitive::core_0_pif_pms_constrain_5::W

pub type W = W<CORE_0_PIF_PMS_CONSTRAIN_5_SPEC>;

Register CORE_0_PIF_PMS_CONSTRAIN_5 writer

Aliased Type

struct W { /* private fields */ }

Implementations

impl W

pub fn core_0_pif_pms_constrain_world_1_uart( &mut self ) -> CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_UART_W<'_, CORE_0_PIF_PMS_CONSTRAIN_5_SPEC>

Bits 0:1 - core_0_pif_pms_constrain_world_1_uart

pub fn core_0_pif_pms_constrain_world_1_g0spi_1( &mut self ) -> CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_G0SPI_1_W<'_, CORE_0_PIF_PMS_CONSTRAIN_5_SPEC>

Bits 2:3 - core_0_pif_pms_constrain_world_1_g0spi_1

pub fn core_0_pif_pms_constrain_world_1_g0spi_0( &mut self ) -> CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_G0SPI_0_W<'_, CORE_0_PIF_PMS_CONSTRAIN_5_SPEC>

Bits 4:5 - core_0_pif_pms_constrain_world_1_g0spi_0

pub fn core_0_pif_pms_constrain_world_1_gpio( &mut self ) -> CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_GPIO_W<'_, CORE_0_PIF_PMS_CONSTRAIN_5_SPEC>

Bits 6:7 - core_0_pif_pms_constrain_world_1_gpio

pub fn core_0_pif_pms_constrain_world_1_fe2( &mut self ) -> CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_FE2_W<'_, CORE_0_PIF_PMS_CONSTRAIN_5_SPEC>

Bits 8:9 - core_0_pif_pms_constrain_world_1_fe2

pub fn core_0_pif_pms_constrain_world_1_fe( &mut self ) -> CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_FE_W<'_, CORE_0_PIF_PMS_CONSTRAIN_5_SPEC>

Bits 10:11 - core_0_pif_pms_constrain_world_1_fe

pub fn core_0_pif_pms_constrain_world_1_timer( &mut self ) -> CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_TIMER_W<'_, CORE_0_PIF_PMS_CONSTRAIN_5_SPEC>

Bits 12:13 - core_0_pif_pms_constrain_world_1_timer

pub fn core_0_pif_pms_constrain_world_1_rtc( &mut self ) -> CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_RTC_W<'_, CORE_0_PIF_PMS_CONSTRAIN_5_SPEC>

Bits 14:15 - core_0_pif_pms_constrain_world_1_rtc

pub fn core_0_pif_pms_constrain_world_1_io_mux( &mut self ) -> CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_IO_MUX_W<'_, CORE_0_PIF_PMS_CONSTRAIN_5_SPEC>

Bits 16:17 - core_0_pif_pms_constrain_world_1_io_mux

pub fn core_0_pif_pms_constrain_world_1_wdg( &mut self ) -> CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_WDG_W<'_, CORE_0_PIF_PMS_CONSTRAIN_5_SPEC>

Bits 18:19 - core_0_pif_pms_constrain_world_1_wdg

pub fn core_0_pif_pms_constrain_world_1_misc( &mut self ) -> CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_MISC_W<'_, CORE_0_PIF_PMS_CONSTRAIN_5_SPEC>

Bits 24:25 - core_0_pif_pms_constrain_world_1_misc

pub fn core_0_pif_pms_constrain_world_1_i2c( &mut self ) -> CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_I2C_W<'_, CORE_0_PIF_PMS_CONSTRAIN_5_SPEC>

Bits 26:27 - core_0_pif_pms_constrain_world_1_i2c

pub fn core_0_pif_pms_constrain_world_1_uart1( &mut self ) -> CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_UART1_W<'_, CORE_0_PIF_PMS_CONSTRAIN_5_SPEC>

Bits 30:31 - core_0_pif_pms_constrain_world_1_uart1