#[doc = "Register `CORE_0_PIF_PMS_CONSTRAIN_5` reader"]
pub type R = crate::R<CORE_0_PIF_PMS_CONSTRAIN_5_SPEC>;
#[doc = "Register `CORE_0_PIF_PMS_CONSTRAIN_5` writer"]
pub type W = crate::W<CORE_0_PIF_PMS_CONSTRAIN_5_SPEC>;
#[doc = "Field `CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_UART` reader - core_0_pif_pms_constrain_world_1_uart"]
pub type CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_UART_R = crate::FieldReader;
#[doc = "Field `CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_UART` writer - core_0_pif_pms_constrain_world_1_uart"]
pub type CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_UART_W<'a, REG> = crate::FieldWriter<'a, REG, 2>;
#[doc = "Field `CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_G0SPI_1` reader - core_0_pif_pms_constrain_world_1_g0spi_1"]
pub type CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_G0SPI_1_R = crate::FieldReader;
#[doc = "Field `CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_G0SPI_1` writer - core_0_pif_pms_constrain_world_1_g0spi_1"]
pub type CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_G0SPI_1_W<'a, REG> = crate::FieldWriter<'a, REG, 2>;
#[doc = "Field `CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_G0SPI_0` reader - core_0_pif_pms_constrain_world_1_g0spi_0"]
pub type CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_G0SPI_0_R = crate::FieldReader;
#[doc = "Field `CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_G0SPI_0` writer - core_0_pif_pms_constrain_world_1_g0spi_0"]
pub type CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_G0SPI_0_W<'a, REG> = crate::FieldWriter<'a, REG, 2>;
#[doc = "Field `CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_GPIO` reader - core_0_pif_pms_constrain_world_1_gpio"]
pub type CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_GPIO_R = crate::FieldReader;
#[doc = "Field `CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_GPIO` writer - core_0_pif_pms_constrain_world_1_gpio"]
pub type CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_GPIO_W<'a, REG> = crate::FieldWriter<'a, REG, 2>;
#[doc = "Field `CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_FE2` reader - core_0_pif_pms_constrain_world_1_fe2"]
pub type CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_FE2_R = crate::FieldReader;
#[doc = "Field `CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_FE2` writer - core_0_pif_pms_constrain_world_1_fe2"]
pub type CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_FE2_W<'a, REG> = crate::FieldWriter<'a, REG, 2>;
#[doc = "Field `CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_FE` reader - core_0_pif_pms_constrain_world_1_fe"]
pub type CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_FE_R = crate::FieldReader;
#[doc = "Field `CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_FE` writer - core_0_pif_pms_constrain_world_1_fe"]
pub type CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_FE_W<'a, REG> = crate::FieldWriter<'a, REG, 2>;
#[doc = "Field `CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_TIMER` reader - core_0_pif_pms_constrain_world_1_timer"]
pub type CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_TIMER_R = crate::FieldReader;
#[doc = "Field `CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_TIMER` writer - core_0_pif_pms_constrain_world_1_timer"]
pub type CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_TIMER_W<'a, REG> = crate::FieldWriter<'a, REG, 2>;
#[doc = "Field `CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_RTC` reader - core_0_pif_pms_constrain_world_1_rtc"]
pub type CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_RTC_R = crate::FieldReader;
#[doc = "Field `CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_RTC` writer - core_0_pif_pms_constrain_world_1_rtc"]
pub type CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_RTC_W<'a, REG> = crate::FieldWriter<'a, REG, 2>;
#[doc = "Field `CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_IO_MUX` reader - core_0_pif_pms_constrain_world_1_io_mux"]
pub type CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_IO_MUX_R = crate::FieldReader;
#[doc = "Field `CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_IO_MUX` writer - core_0_pif_pms_constrain_world_1_io_mux"]
pub type CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_IO_MUX_W<'a, REG> = crate::FieldWriter<'a, REG, 2>;
#[doc = "Field `CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_WDG` reader - core_0_pif_pms_constrain_world_1_wdg"]
pub type CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_WDG_R = crate::FieldReader;
#[doc = "Field `CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_WDG` writer - core_0_pif_pms_constrain_world_1_wdg"]
pub type CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_WDG_W<'a, REG> = crate::FieldWriter<'a, REG, 2>;
#[doc = "Field `CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_MISC` reader - core_0_pif_pms_constrain_world_1_misc"]
pub type CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_MISC_R = crate::FieldReader;
#[doc = "Field `CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_MISC` writer - core_0_pif_pms_constrain_world_1_misc"]
pub type CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_MISC_W<'a, REG> = crate::FieldWriter<'a, REG, 2>;
#[doc = "Field `CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_I2C` reader - core_0_pif_pms_constrain_world_1_i2c"]
pub type CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_I2C_R = crate::FieldReader;
#[doc = "Field `CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_I2C` writer - core_0_pif_pms_constrain_world_1_i2c"]
pub type CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_I2C_W<'a, REG> = crate::FieldWriter<'a, REG, 2>;
#[doc = "Field `CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_UART1` reader - core_0_pif_pms_constrain_world_1_uart1"]
pub type CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_UART1_R = crate::FieldReader;
#[doc = "Field `CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_UART1` writer - core_0_pif_pms_constrain_world_1_uart1"]
pub type CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_UART1_W<'a, REG> = crate::FieldWriter<'a, REG, 2>;
impl R {
    #[doc = "Bits 0:1 - core_0_pif_pms_constrain_world_1_uart"]
    #[inline(always)]
    pub fn core_0_pif_pms_constrain_world_1_uart(&self) -> CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_UART_R {
        CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_UART_R::new((self.bits & 3) as u8)
    }
    #[doc = "Bits 2:3 - core_0_pif_pms_constrain_world_1_g0spi_1"]
    #[inline(always)]
    pub fn core_0_pif_pms_constrain_world_1_g0spi_1(
        &self,
    ) -> CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_G0SPI_1_R {
        CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_G0SPI_1_R::new(((self.bits >> 2) & 3) as u8)
    }
    #[doc = "Bits 4:5 - core_0_pif_pms_constrain_world_1_g0spi_0"]
    #[inline(always)]
    pub fn core_0_pif_pms_constrain_world_1_g0spi_0(
        &self,
    ) -> CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_G0SPI_0_R {
        CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_G0SPI_0_R::new(((self.bits >> 4) & 3) as u8)
    }
    #[doc = "Bits 6:7 - core_0_pif_pms_constrain_world_1_gpio"]
    #[inline(always)]
    pub fn core_0_pif_pms_constrain_world_1_gpio(&self) -> CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_GPIO_R {
        CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_GPIO_R::new(((self.bits >> 6) & 3) as u8)
    }
    #[doc = "Bits 8:9 - core_0_pif_pms_constrain_world_1_fe2"]
    #[inline(always)]
    pub fn core_0_pif_pms_constrain_world_1_fe2(&self) -> CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_FE2_R {
        CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_FE2_R::new(((self.bits >> 8) & 3) as u8)
    }
    #[doc = "Bits 10:11 - core_0_pif_pms_constrain_world_1_fe"]
    #[inline(always)]
    pub fn core_0_pif_pms_constrain_world_1_fe(&self) -> CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_FE_R {
        CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_FE_R::new(((self.bits >> 10) & 3) as u8)
    }
    #[doc = "Bits 12:13 - core_0_pif_pms_constrain_world_1_timer"]
    #[inline(always)]
    pub fn core_0_pif_pms_constrain_world_1_timer(
        &self,
    ) -> CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_TIMER_R {
        CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_TIMER_R::new(((self.bits >> 12) & 3) as u8)
    }
    #[doc = "Bits 14:15 - core_0_pif_pms_constrain_world_1_rtc"]
    #[inline(always)]
    pub fn core_0_pif_pms_constrain_world_1_rtc(&self) -> CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_RTC_R {
        CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_RTC_R::new(((self.bits >> 14) & 3) as u8)
    }
    #[doc = "Bits 16:17 - core_0_pif_pms_constrain_world_1_io_mux"]
    #[inline(always)]
    pub fn core_0_pif_pms_constrain_world_1_io_mux(
        &self,
    ) -> CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_IO_MUX_R {
        CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_IO_MUX_R::new(((self.bits >> 16) & 3) as u8)
    }
    #[doc = "Bits 18:19 - core_0_pif_pms_constrain_world_1_wdg"]
    #[inline(always)]
    pub fn core_0_pif_pms_constrain_world_1_wdg(&self) -> CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_WDG_R {
        CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_WDG_R::new(((self.bits >> 18) & 3) as u8)
    }
    #[doc = "Bits 24:25 - core_0_pif_pms_constrain_world_1_misc"]
    #[inline(always)]
    pub fn core_0_pif_pms_constrain_world_1_misc(&self) -> CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_MISC_R {
        CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_MISC_R::new(((self.bits >> 24) & 3) as u8)
    }
    #[doc = "Bits 26:27 - core_0_pif_pms_constrain_world_1_i2c"]
    #[inline(always)]
    pub fn core_0_pif_pms_constrain_world_1_i2c(&self) -> CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_I2C_R {
        CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_I2C_R::new(((self.bits >> 26) & 3) as u8)
    }
    #[doc = "Bits 30:31 - core_0_pif_pms_constrain_world_1_uart1"]
    #[inline(always)]
    pub fn core_0_pif_pms_constrain_world_1_uart1(
        &self,
    ) -> CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_UART1_R {
        CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_UART1_R::new(((self.bits >> 30) & 3) as u8)
    }
}
#[cfg(feature = "impl-register-debug")]
impl core::fmt::Debug for R {
    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
        f.debug_struct("CORE_0_PIF_PMS_CONSTRAIN_5")
            .field(
                "core_0_pif_pms_constrain_world_1_uart",
                &self.core_0_pif_pms_constrain_world_1_uart(),
            )
            .field(
                "core_0_pif_pms_constrain_world_1_g0spi_1",
                &self.core_0_pif_pms_constrain_world_1_g0spi_1(),
            )
            .field(
                "core_0_pif_pms_constrain_world_1_g0spi_0",
                &self.core_0_pif_pms_constrain_world_1_g0spi_0(),
            )
            .field(
                "core_0_pif_pms_constrain_world_1_gpio",
                &self.core_0_pif_pms_constrain_world_1_gpio(),
            )
            .field(
                "core_0_pif_pms_constrain_world_1_fe2",
                &self.core_0_pif_pms_constrain_world_1_fe2(),
            )
            .field(
                "core_0_pif_pms_constrain_world_1_fe",
                &self.core_0_pif_pms_constrain_world_1_fe(),
            )
            .field(
                "core_0_pif_pms_constrain_world_1_timer",
                &self.core_0_pif_pms_constrain_world_1_timer(),
            )
            .field(
                "core_0_pif_pms_constrain_world_1_rtc",
                &self.core_0_pif_pms_constrain_world_1_rtc(),
            )
            .field(
                "core_0_pif_pms_constrain_world_1_io_mux",
                &self.core_0_pif_pms_constrain_world_1_io_mux(),
            )
            .field(
                "core_0_pif_pms_constrain_world_1_wdg",
                &self.core_0_pif_pms_constrain_world_1_wdg(),
            )
            .field(
                "core_0_pif_pms_constrain_world_1_misc",
                &self.core_0_pif_pms_constrain_world_1_misc(),
            )
            .field(
                "core_0_pif_pms_constrain_world_1_i2c",
                &self.core_0_pif_pms_constrain_world_1_i2c(),
            )
            .field(
                "core_0_pif_pms_constrain_world_1_uart1",
                &self.core_0_pif_pms_constrain_world_1_uart1(),
            )
            .finish()
    }
}
impl W {
    #[doc = "Bits 0:1 - core_0_pif_pms_constrain_world_1_uart"]
    #[inline(always)]
    #[must_use]
    pub fn core_0_pif_pms_constrain_world_1_uart(
        &mut self,
    ) -> CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_UART_W<CORE_0_PIF_PMS_CONSTRAIN_5_SPEC> {
        CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_UART_W::new(self, 0)
    }
    #[doc = "Bits 2:3 - core_0_pif_pms_constrain_world_1_g0spi_1"]
    #[inline(always)]
    #[must_use]
    pub fn core_0_pif_pms_constrain_world_1_g0spi_1(
        &mut self,
    ) -> CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_G0SPI_1_W<CORE_0_PIF_PMS_CONSTRAIN_5_SPEC> {
        CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_G0SPI_1_W::new(self, 2)
    }
    #[doc = "Bits 4:5 - core_0_pif_pms_constrain_world_1_g0spi_0"]
    #[inline(always)]
    #[must_use]
    pub fn core_0_pif_pms_constrain_world_1_g0spi_0(
        &mut self,
    ) -> CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_G0SPI_0_W<CORE_0_PIF_PMS_CONSTRAIN_5_SPEC> {
        CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_G0SPI_0_W::new(self, 4)
    }
    #[doc = "Bits 6:7 - core_0_pif_pms_constrain_world_1_gpio"]
    #[inline(always)]
    #[must_use]
    pub fn core_0_pif_pms_constrain_world_1_gpio(
        &mut self,
    ) -> CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_GPIO_W<CORE_0_PIF_PMS_CONSTRAIN_5_SPEC> {
        CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_GPIO_W::new(self, 6)
    }
    #[doc = "Bits 8:9 - core_0_pif_pms_constrain_world_1_fe2"]
    #[inline(always)]
    #[must_use]
    pub fn core_0_pif_pms_constrain_world_1_fe2(
        &mut self,
    ) -> CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_FE2_W<CORE_0_PIF_PMS_CONSTRAIN_5_SPEC> {
        CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_FE2_W::new(self, 8)
    }
    #[doc = "Bits 10:11 - core_0_pif_pms_constrain_world_1_fe"]
    #[inline(always)]
    #[must_use]
    pub fn core_0_pif_pms_constrain_world_1_fe(
        &mut self,
    ) -> CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_FE_W<CORE_0_PIF_PMS_CONSTRAIN_5_SPEC> {
        CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_FE_W::new(self, 10)
    }
    #[doc = "Bits 12:13 - core_0_pif_pms_constrain_world_1_timer"]
    #[inline(always)]
    #[must_use]
    pub fn core_0_pif_pms_constrain_world_1_timer(
        &mut self,
    ) -> CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_TIMER_W<CORE_0_PIF_PMS_CONSTRAIN_5_SPEC> {
        CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_TIMER_W::new(self, 12)
    }
    #[doc = "Bits 14:15 - core_0_pif_pms_constrain_world_1_rtc"]
    #[inline(always)]
    #[must_use]
    pub fn core_0_pif_pms_constrain_world_1_rtc(
        &mut self,
    ) -> CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_RTC_W<CORE_0_PIF_PMS_CONSTRAIN_5_SPEC> {
        CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_RTC_W::new(self, 14)
    }
    #[doc = "Bits 16:17 - core_0_pif_pms_constrain_world_1_io_mux"]
    #[inline(always)]
    #[must_use]
    pub fn core_0_pif_pms_constrain_world_1_io_mux(
        &mut self,
    ) -> CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_IO_MUX_W<CORE_0_PIF_PMS_CONSTRAIN_5_SPEC> {
        CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_IO_MUX_W::new(self, 16)
    }
    #[doc = "Bits 18:19 - core_0_pif_pms_constrain_world_1_wdg"]
    #[inline(always)]
    #[must_use]
    pub fn core_0_pif_pms_constrain_world_1_wdg(
        &mut self,
    ) -> CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_WDG_W<CORE_0_PIF_PMS_CONSTRAIN_5_SPEC> {
        CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_WDG_W::new(self, 18)
    }
    #[doc = "Bits 24:25 - core_0_pif_pms_constrain_world_1_misc"]
    #[inline(always)]
    #[must_use]
    pub fn core_0_pif_pms_constrain_world_1_misc(
        &mut self,
    ) -> CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_MISC_W<CORE_0_PIF_PMS_CONSTRAIN_5_SPEC> {
        CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_MISC_W::new(self, 24)
    }
    #[doc = "Bits 26:27 - core_0_pif_pms_constrain_world_1_i2c"]
    #[inline(always)]
    #[must_use]
    pub fn core_0_pif_pms_constrain_world_1_i2c(
        &mut self,
    ) -> CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_I2C_W<CORE_0_PIF_PMS_CONSTRAIN_5_SPEC> {
        CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_I2C_W::new(self, 26)
    }
    #[doc = "Bits 30:31 - core_0_pif_pms_constrain_world_1_uart1"]
    #[inline(always)]
    #[must_use]
    pub fn core_0_pif_pms_constrain_world_1_uart1(
        &mut self,
    ) -> CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_UART1_W<CORE_0_PIF_PMS_CONSTRAIN_5_SPEC> {
        CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_UART1_W::new(self, 30)
    }
}
#[doc = "SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_5_REG\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`core_0_pif_pms_constrain_5::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`core_0_pif_pms_constrain_5::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
pub struct CORE_0_PIF_PMS_CONSTRAIN_5_SPEC;
impl crate::RegisterSpec for CORE_0_PIF_PMS_CONSTRAIN_5_SPEC {
    type Ux = u32;
}
#[doc = "`read()` method returns [`core_0_pif_pms_constrain_5::R`](R) reader structure"]
impl crate::Readable for CORE_0_PIF_PMS_CONSTRAIN_5_SPEC {}
#[doc = "`write(|w| ..)` method takes [`core_0_pif_pms_constrain_5::W`](W) writer structure"]
impl crate::Writable for CORE_0_PIF_PMS_CONSTRAIN_5_SPEC {
    type Safety = crate::Unsafe;
    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
}
#[doc = "`reset()` method sets CORE_0_PIF_PMS_CONSTRAIN_5 to value 0xcf0f_ffff"]
impl crate::Resettable for CORE_0_PIF_PMS_CONSTRAIN_5_SPEC {
    const RESET_VALUE: u32 = 0xcf0f_ffff;
}