Type Alias esp32c3::ledc::int_ena::W

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pub type W = W<INT_ENA_SPEC>;
Expand description

Register INT_ENA writer

Aliased Type§

struct W { /* private fields */ }

Implementations§

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impl W

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pub fn timer_ovf(&mut self, n: u8) -> TIMER_OVF_W<'_, INT_ENA_SPEC>

The interrupt enable bit for the TIMER(0-3)_OVF interrupt.

NOTE: n is number of field in register. n == 0 corresponds to TIMER0_OVF field

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pub fn timer0_ovf(&mut self) -> TIMER_OVF_W<'_, INT_ENA_SPEC>

Bit 0 - The interrupt enable bit for the TIMER0_OVF interrupt.

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pub fn timer1_ovf(&mut self) -> TIMER_OVF_W<'_, INT_ENA_SPEC>

Bit 1 - The interrupt enable bit for the TIMER1_OVF interrupt.

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pub fn timer2_ovf(&mut self) -> TIMER_OVF_W<'_, INT_ENA_SPEC>

Bit 2 - The interrupt enable bit for the TIMER2_OVF interrupt.

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pub fn timer3_ovf(&mut self) -> TIMER_OVF_W<'_, INT_ENA_SPEC>

Bit 3 - The interrupt enable bit for the TIMER3_OVF interrupt.

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pub fn duty_chng_end_ch( &mut self, n: u8 ) -> DUTY_CHNG_END_CH_W<'_, INT_ENA_SPEC>

The interrupt enable bit for the DUTY_CHNG_END_CH(0-5) interrupt.

NOTE: n is number of field in register. n == 0 corresponds to DUTY_CHNG_END_CH0 field

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pub fn duty_chng_end_ch0(&mut self) -> DUTY_CHNG_END_CH_W<'_, INT_ENA_SPEC>

Bit 4 - The interrupt enable bit for the DUTY_CHNG_END_CH0 interrupt.

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pub fn duty_chng_end_ch1(&mut self) -> DUTY_CHNG_END_CH_W<'_, INT_ENA_SPEC>

Bit 5 - The interrupt enable bit for the DUTY_CHNG_END_CH1 interrupt.

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pub fn duty_chng_end_ch2(&mut self) -> DUTY_CHNG_END_CH_W<'_, INT_ENA_SPEC>

Bit 6 - The interrupt enable bit for the DUTY_CHNG_END_CH2 interrupt.

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pub fn duty_chng_end_ch3(&mut self) -> DUTY_CHNG_END_CH_W<'_, INT_ENA_SPEC>

Bit 7 - The interrupt enable bit for the DUTY_CHNG_END_CH3 interrupt.

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pub fn duty_chng_end_ch4(&mut self) -> DUTY_CHNG_END_CH_W<'_, INT_ENA_SPEC>

Bit 8 - The interrupt enable bit for the DUTY_CHNG_END_CH4 interrupt.

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pub fn duty_chng_end_ch5(&mut self) -> DUTY_CHNG_END_CH_W<'_, INT_ENA_SPEC>

Bit 9 - The interrupt enable bit for the DUTY_CHNG_END_CH5 interrupt.

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pub fn ovf_cnt_ch(&mut self, n: u8) -> OVF_CNT_CH_W<'_, INT_ENA_SPEC>

The interrupt enable bit for the OVF_CNT_CH(0-5) interrupt.

NOTE: n is number of field in register. n == 0 corresponds to OVF_CNT_CH0 field

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pub fn ovf_cnt_ch0(&mut self) -> OVF_CNT_CH_W<'_, INT_ENA_SPEC>

Bit 10 - The interrupt enable bit for the OVF_CNT_CH0 interrupt.

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pub fn ovf_cnt_ch1(&mut self) -> OVF_CNT_CH_W<'_, INT_ENA_SPEC>

Bit 11 - The interrupt enable bit for the OVF_CNT_CH1 interrupt.

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pub fn ovf_cnt_ch2(&mut self) -> OVF_CNT_CH_W<'_, INT_ENA_SPEC>

Bit 12 - The interrupt enable bit for the OVF_CNT_CH2 interrupt.

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pub fn ovf_cnt_ch3(&mut self) -> OVF_CNT_CH_W<'_, INT_ENA_SPEC>

Bit 13 - The interrupt enable bit for the OVF_CNT_CH3 interrupt.

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pub fn ovf_cnt_ch4(&mut self) -> OVF_CNT_CH_W<'_, INT_ENA_SPEC>

Bit 14 - The interrupt enable bit for the OVF_CNT_CH4 interrupt.

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pub fn ovf_cnt_ch5(&mut self) -> OVF_CNT_CH_W<'_, INT_ENA_SPEC>

Bit 15 - The interrupt enable bit for the OVF_CNT_CH5 interrupt.