Expand description
a
Structs
Field CLK_EN reader - 1’b1: Force clock on for register. 1’b0: Support clock only when application writes registers.
Field CLK_EN writer - 1’b1: Force clock on for register. 1’b0: Support clock only when application writes registers.
Field CRC_REC_EN reader - Set this bit to enable UHCI to receive the 16 bit CRC.
Field CRC_REC_EN writer - Set this bit to enable UHCI to receive the 16 bit CRC.
Field ENCODE_CRC_EN reader - Set this bit to enable data integrity checking by appending a 16 bit CCITT-CRC to end of the payload.
Field ENCODE_CRC_EN writer - Set this bit to enable data integrity checking by appending a 16 bit CCITT-CRC to end of the payload.
Field HEAD_EN reader - Set this bit to encode the data packet with a formatting header.
Field HEAD_EN writer - Set this bit to encode the data packet with a formatting header.
Field LEN_EOF_EN reader - If this bit is set to 1, UHCI decoder receiving payload data is end when the receiving byte count has reached the specified value. The value is payload length indicated by UHCI packet header when UHCI_HEAD_EN is 1 or the value is configuration value when UHCI_HEAD_EN is 0. If this bit is set to 0, UHCI decoder receiving payload data is end when 0xc0 is received.
Field LEN_EOF_EN writer - If this bit is set to 1, UHCI decoder receiving payload data is end when the receiving byte count has reached the specified value. The value is payload length indicated by UHCI packet header when UHCI_HEAD_EN is 1 or the value is configuration value when UHCI_HEAD_EN is 0. If this bit is set to 0, UHCI decoder receiving payload data is end when 0xc0 is received.
Register CONF0 reader
Field RX_RST reader - Write 1, then write 0 to this bit to reset encode state machine.
Field RX_RST writer - Write 1, then write 0 to this bit to reset encode state machine.
Field SEPER_EN reader - Set this bit to separate the data frame using a special char.
Field SEPER_EN writer - Set this bit to separate the data frame using a special char.
Field TX_RST reader - Write 1, then write 0 to this bit to reset decode state machine.
Field TX_RST writer - Write 1, then write 0 to this bit to reset decode state machine.
Field UART0_CE reader - Set this bit to link up HCI and UART0.
Field UART0_CE writer - Set this bit to link up HCI and UART0.
Field UART1_CE reader - Set this bit to link up HCI and UART1.
Field UART1_CE writer - Set this bit to link up HCI and UART1.
Field UART_IDLE_EOF_EN reader - If this bit is set to 1, UHCI will end the payload receiving process when UART has been in idle state.
Field UART_IDLE_EOF_EN writer - If this bit is set to 1, UHCI will end the payload receiving process when UART has been in idle state.
Field UART_RX_BRK_EOF_EN reader - If this bit is set to 1, UHCI will end payload receive process when NULL frame is received by UART.
Field UART_RX_BRK_EOF_EN writer - If this bit is set to 1, UHCI will end payload receive process when NULL frame is received by UART.
Register CONF0 writer