esp32c3/rtc_cntl/
reset_state.rs

1#[doc = "Register `RESET_STATE` reader"]
2pub type R = crate::R<RESET_STATE_SPEC>;
3#[doc = "Register `RESET_STATE` writer"]
4pub type W = crate::W<RESET_STATE_SPEC>;
5#[doc = "Field `RESET_CAUSE_PROCPU` reader - reset cause of PRO CPU"]
6pub type RESET_CAUSE_PROCPU_R = crate::FieldReader;
7#[doc = "Field `RESET_CAUSE_APPCPU` reader - reset cause of APP CPU"]
8pub type RESET_CAUSE_APPCPU_R = crate::FieldReader;
9#[doc = "Field `STAT_VECTOR_SEL_APPCPU` reader - APP CPU state vector sel"]
10pub type STAT_VECTOR_SEL_APPCPU_R = crate::BitReader;
11#[doc = "Field `STAT_VECTOR_SEL_APPCPU` writer - APP CPU state vector sel"]
12pub type STAT_VECTOR_SEL_APPCPU_W<'a, REG> = crate::BitWriter<'a, REG>;
13#[doc = "Field `STAT_VECTOR_SEL_PROCPU` reader - PRO CPU state vector sel"]
14pub type STAT_VECTOR_SEL_PROCPU_R = crate::BitReader;
15#[doc = "Field `STAT_VECTOR_SEL_PROCPU` writer - PRO CPU state vector sel"]
16pub type STAT_VECTOR_SEL_PROCPU_W<'a, REG> = crate::BitWriter<'a, REG>;
17#[doc = "Field `ALL_RESET_FLAG_PROCPU` reader - PRO CPU reset_flag"]
18pub type ALL_RESET_FLAG_PROCPU_R = crate::BitReader;
19#[doc = "Field `ALL_RESET_FLAG_APPCPU` reader - APP CPU reset flag"]
20pub type ALL_RESET_FLAG_APPCPU_R = crate::BitReader;
21#[doc = "Field `ALL_RESET_FLAG_CLR_PROCPU` writer - clear PRO CPU reset_flag"]
22pub type ALL_RESET_FLAG_CLR_PROCPU_W<'a, REG> = crate::BitWriter<'a, REG>;
23#[doc = "Field `ALL_RESET_FLAG_CLR_APPCPU` writer - clear APP CPU reset flag"]
24pub type ALL_RESET_FLAG_CLR_APPCPU_W<'a, REG> = crate::BitWriter<'a, REG>;
25#[doc = "Field `OCD_HALT_ON_RESET_APPCPU` reader - APPCPU OcdHaltOnReset"]
26pub type OCD_HALT_ON_RESET_APPCPU_R = crate::BitReader;
27#[doc = "Field `OCD_HALT_ON_RESET_APPCPU` writer - APPCPU OcdHaltOnReset"]
28pub type OCD_HALT_ON_RESET_APPCPU_W<'a, REG> = crate::BitWriter<'a, REG>;
29#[doc = "Field `OCD_HALT_ON_RESET_PROCPU` reader - PROCPU OcdHaltOnReset"]
30pub type OCD_HALT_ON_RESET_PROCPU_R = crate::BitReader;
31#[doc = "Field `OCD_HALT_ON_RESET_PROCPU` writer - PROCPU OcdHaltOnReset"]
32pub type OCD_HALT_ON_RESET_PROCPU_W<'a, REG> = crate::BitWriter<'a, REG>;
33#[doc = "Field `JTAG_RESET_FLAG_PROCPU` reader - configure jtag reset configure"]
34pub type JTAG_RESET_FLAG_PROCPU_R = crate::BitReader;
35#[doc = "Field `JTAG_RESET_FLAG_APPCPU` reader - configure jtag reset configure"]
36pub type JTAG_RESET_FLAG_APPCPU_R = crate::BitReader;
37#[doc = "Field `JTAG_RESET_FLAG_CLR_PROCPU` writer - configure jtag reset configure"]
38pub type JTAG_RESET_FLAG_CLR_PROCPU_W<'a, REG> = crate::BitWriter<'a, REG>;
39#[doc = "Field `JTAG_RESET_FLAG_CLR_APPCPU` writer - configure jtag reset configure"]
40pub type JTAG_RESET_FLAG_CLR_APPCPU_W<'a, REG> = crate::BitWriter<'a, REG>;
41#[doc = "Field `DRESET_MASK_APPCPU` reader - configure dreset configure"]
42pub type DRESET_MASK_APPCPU_R = crate::BitReader;
43#[doc = "Field `DRESET_MASK_APPCPU` writer - configure dreset configure"]
44pub type DRESET_MASK_APPCPU_W<'a, REG> = crate::BitWriter<'a, REG>;
45#[doc = "Field `DRESET_MASK_PROCPU` reader - configure dreset configure"]
46pub type DRESET_MASK_PROCPU_R = crate::BitReader;
47#[doc = "Field `DRESET_MASK_PROCPU` writer - configure dreset configure"]
48pub type DRESET_MASK_PROCPU_W<'a, REG> = crate::BitWriter<'a, REG>;
49impl R {
50    #[doc = "Bits 0:5 - reset cause of PRO CPU"]
51    #[inline(always)]
52    pub fn reset_cause_procpu(&self) -> RESET_CAUSE_PROCPU_R {
53        RESET_CAUSE_PROCPU_R::new((self.bits & 0x3f) as u8)
54    }
55    #[doc = "Bits 6:11 - reset cause of APP CPU"]
56    #[inline(always)]
57    pub fn reset_cause_appcpu(&self) -> RESET_CAUSE_APPCPU_R {
58        RESET_CAUSE_APPCPU_R::new(((self.bits >> 6) & 0x3f) as u8)
59    }
60    #[doc = "Bit 12 - APP CPU state vector sel"]
61    #[inline(always)]
62    pub fn stat_vector_sel_appcpu(&self) -> STAT_VECTOR_SEL_APPCPU_R {
63        STAT_VECTOR_SEL_APPCPU_R::new(((self.bits >> 12) & 1) != 0)
64    }
65    #[doc = "Bit 13 - PRO CPU state vector sel"]
66    #[inline(always)]
67    pub fn stat_vector_sel_procpu(&self) -> STAT_VECTOR_SEL_PROCPU_R {
68        STAT_VECTOR_SEL_PROCPU_R::new(((self.bits >> 13) & 1) != 0)
69    }
70    #[doc = "Bit 14 - PRO CPU reset_flag"]
71    #[inline(always)]
72    pub fn all_reset_flag_procpu(&self) -> ALL_RESET_FLAG_PROCPU_R {
73        ALL_RESET_FLAG_PROCPU_R::new(((self.bits >> 14) & 1) != 0)
74    }
75    #[doc = "Bit 15 - APP CPU reset flag"]
76    #[inline(always)]
77    pub fn all_reset_flag_appcpu(&self) -> ALL_RESET_FLAG_APPCPU_R {
78        ALL_RESET_FLAG_APPCPU_R::new(((self.bits >> 15) & 1) != 0)
79    }
80    #[doc = "Bit 18 - APPCPU OcdHaltOnReset"]
81    #[inline(always)]
82    pub fn ocd_halt_on_reset_appcpu(&self) -> OCD_HALT_ON_RESET_APPCPU_R {
83        OCD_HALT_ON_RESET_APPCPU_R::new(((self.bits >> 18) & 1) != 0)
84    }
85    #[doc = "Bit 19 - PROCPU OcdHaltOnReset"]
86    #[inline(always)]
87    pub fn ocd_halt_on_reset_procpu(&self) -> OCD_HALT_ON_RESET_PROCPU_R {
88        OCD_HALT_ON_RESET_PROCPU_R::new(((self.bits >> 19) & 1) != 0)
89    }
90    #[doc = "Bit 20 - configure jtag reset configure"]
91    #[inline(always)]
92    pub fn jtag_reset_flag_procpu(&self) -> JTAG_RESET_FLAG_PROCPU_R {
93        JTAG_RESET_FLAG_PROCPU_R::new(((self.bits >> 20) & 1) != 0)
94    }
95    #[doc = "Bit 21 - configure jtag reset configure"]
96    #[inline(always)]
97    pub fn jtag_reset_flag_appcpu(&self) -> JTAG_RESET_FLAG_APPCPU_R {
98        JTAG_RESET_FLAG_APPCPU_R::new(((self.bits >> 21) & 1) != 0)
99    }
100    #[doc = "Bit 24 - configure dreset configure"]
101    #[inline(always)]
102    pub fn dreset_mask_appcpu(&self) -> DRESET_MASK_APPCPU_R {
103        DRESET_MASK_APPCPU_R::new(((self.bits >> 24) & 1) != 0)
104    }
105    #[doc = "Bit 25 - configure dreset configure"]
106    #[inline(always)]
107    pub fn dreset_mask_procpu(&self) -> DRESET_MASK_PROCPU_R {
108        DRESET_MASK_PROCPU_R::new(((self.bits >> 25) & 1) != 0)
109    }
110}
111#[cfg(feature = "impl-register-debug")]
112impl core::fmt::Debug for R {
113    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
114        f.debug_struct("RESET_STATE")
115            .field("reset_cause_procpu", &self.reset_cause_procpu())
116            .field("reset_cause_appcpu", &self.reset_cause_appcpu())
117            .field("stat_vector_sel_appcpu", &self.stat_vector_sel_appcpu())
118            .field("stat_vector_sel_procpu", &self.stat_vector_sel_procpu())
119            .field("all_reset_flag_procpu", &self.all_reset_flag_procpu())
120            .field("all_reset_flag_appcpu", &self.all_reset_flag_appcpu())
121            .field("ocd_halt_on_reset_appcpu", &self.ocd_halt_on_reset_appcpu())
122            .field("ocd_halt_on_reset_procpu", &self.ocd_halt_on_reset_procpu())
123            .field("jtag_reset_flag_procpu", &self.jtag_reset_flag_procpu())
124            .field("jtag_reset_flag_appcpu", &self.jtag_reset_flag_appcpu())
125            .field("dreset_mask_appcpu", &self.dreset_mask_appcpu())
126            .field("dreset_mask_procpu", &self.dreset_mask_procpu())
127            .finish()
128    }
129}
130impl W {
131    #[doc = "Bit 12 - APP CPU state vector sel"]
132    #[inline(always)]
133    pub fn stat_vector_sel_appcpu(&mut self) -> STAT_VECTOR_SEL_APPCPU_W<RESET_STATE_SPEC> {
134        STAT_VECTOR_SEL_APPCPU_W::new(self, 12)
135    }
136    #[doc = "Bit 13 - PRO CPU state vector sel"]
137    #[inline(always)]
138    pub fn stat_vector_sel_procpu(&mut self) -> STAT_VECTOR_SEL_PROCPU_W<RESET_STATE_SPEC> {
139        STAT_VECTOR_SEL_PROCPU_W::new(self, 13)
140    }
141    #[doc = "Bit 16 - clear PRO CPU reset_flag"]
142    #[inline(always)]
143    pub fn all_reset_flag_clr_procpu(&mut self) -> ALL_RESET_FLAG_CLR_PROCPU_W<RESET_STATE_SPEC> {
144        ALL_RESET_FLAG_CLR_PROCPU_W::new(self, 16)
145    }
146    #[doc = "Bit 17 - clear APP CPU reset flag"]
147    #[inline(always)]
148    pub fn all_reset_flag_clr_appcpu(&mut self) -> ALL_RESET_FLAG_CLR_APPCPU_W<RESET_STATE_SPEC> {
149        ALL_RESET_FLAG_CLR_APPCPU_W::new(self, 17)
150    }
151    #[doc = "Bit 18 - APPCPU OcdHaltOnReset"]
152    #[inline(always)]
153    pub fn ocd_halt_on_reset_appcpu(&mut self) -> OCD_HALT_ON_RESET_APPCPU_W<RESET_STATE_SPEC> {
154        OCD_HALT_ON_RESET_APPCPU_W::new(self, 18)
155    }
156    #[doc = "Bit 19 - PROCPU OcdHaltOnReset"]
157    #[inline(always)]
158    pub fn ocd_halt_on_reset_procpu(&mut self) -> OCD_HALT_ON_RESET_PROCPU_W<RESET_STATE_SPEC> {
159        OCD_HALT_ON_RESET_PROCPU_W::new(self, 19)
160    }
161    #[doc = "Bit 22 - configure jtag reset configure"]
162    #[inline(always)]
163    pub fn jtag_reset_flag_clr_procpu(&mut self) -> JTAG_RESET_FLAG_CLR_PROCPU_W<RESET_STATE_SPEC> {
164        JTAG_RESET_FLAG_CLR_PROCPU_W::new(self, 22)
165    }
166    #[doc = "Bit 23 - configure jtag reset configure"]
167    #[inline(always)]
168    pub fn jtag_reset_flag_clr_appcpu(&mut self) -> JTAG_RESET_FLAG_CLR_APPCPU_W<RESET_STATE_SPEC> {
169        JTAG_RESET_FLAG_CLR_APPCPU_W::new(self, 23)
170    }
171    #[doc = "Bit 24 - configure dreset configure"]
172    #[inline(always)]
173    pub fn dreset_mask_appcpu(&mut self) -> DRESET_MASK_APPCPU_W<RESET_STATE_SPEC> {
174        DRESET_MASK_APPCPU_W::new(self, 24)
175    }
176    #[doc = "Bit 25 - configure dreset configure"]
177    #[inline(always)]
178    pub fn dreset_mask_procpu(&mut self) -> DRESET_MASK_PROCPU_W<RESET_STATE_SPEC> {
179        DRESET_MASK_PROCPU_W::new(self, 25)
180    }
181}
182#[doc = "rtc configure register\n\nYou can [`read`](crate::Reg::read) this register and get [`reset_state::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`reset_state::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
183pub struct RESET_STATE_SPEC;
184impl crate::RegisterSpec for RESET_STATE_SPEC {
185    type Ux = u32;
186}
187#[doc = "`read()` method returns [`reset_state::R`](R) reader structure"]
188impl crate::Readable for RESET_STATE_SPEC {}
189#[doc = "`write(|w| ..)` method takes [`reset_state::W`](W) writer structure"]
190impl crate::Writable for RESET_STATE_SPEC {
191    type Safety = crate::Unsafe;
192}
193#[doc = "`reset()` method sets RESET_STATE to value 0x3000"]
194impl crate::Resettable for RESET_STATE_SPEC {
195    const RESET_VALUE: u32 = 0x3000;
196}
esp32c3/rtc_cntl/reset_state.rs

esp32c3/rtc_cntl/
reset_state.rs
